公开(公告)号：US07837838B2

公开(公告)日：2010-11-23

申请号：US11614027

申请日：2006-12-20

申请人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

发明人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

IPC分类号： C23C14/34

CPC分类号： H01L21/31645 ,  C23C14/10 ,  C23C14/345 ,  C23C14/3471 ,  H01L21/02148 ,  H01L21/02156 ,  H01L21/02161 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02321 ,  H01L21/02323 ,  H01L21/02329 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/3144 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L29/51

摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。

公开(公告)号：US07645710B2

公开(公告)日：2010-01-12

申请号：US11683984

申请日：2007-03-08

申请人： Christopher Sean Olsen ,  Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

发明人： Christopher Sean Olsen ,  Thai Cheng Chua ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02175 ,  H01J37/32082 ,  H01J37/32146 ,  H01L21/02148 ,  H01L21/02197 ,  H01L21/02266 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31155 ,  H01L21/3144 ,  H01L21/316 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。

公开(公告)号：US20070212895A1

公开(公告)日：2007-09-13

申请号：US11614019

申请日：2006-12-20

申请人： Thai Cheng CHUA ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

发明人： Thai Cheng CHUA ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Alex M. Paterson ,  Valentin Todorow ,  John P. Holland

IPC分类号： H01L21/31

CPC分类号： H01L21/02175 ,  H01J37/32082 ,  H01J37/32146 ,  H01L21/02148 ,  H01L21/02266 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31155 ,  H01L21/3144 ,  H01L21/316 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。

公开(公告)号：US20070218623A1

公开(公告)日：2007-09-20

申请号：US11614027

申请日：2006-12-20

申请人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

发明人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

IPC分类号： H01L21/8242

CPC分类号： H01L21/31645 ,  C23C14/10 ,  C23C14/345 ,  C23C14/3471 ,  H01L21/02148 ,  H01L21/02156 ,  H01L21/02161 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02321 ,  H01L21/02323 ,  H01L21/02329 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/3144 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L29/51

摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。

公开(公告)号：US20070209930A1

公开(公告)日：2007-09-13

申请号：US11614022

申请日：2006-12-20

申请人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

发明人： Thai Cheng Chua ,  Alex M. Paterson ,  Steven Hung ,  Patricia M. Liu ,  Tatsuya Sato ,  Valentin Todorow ,  John P. Holland

IPC分类号： C23C14/00

CPC分类号： C23C8/10 ,  C23C8/36 ,  C23C14/021 ,  C23C14/027 ,  C23C14/48 ,  C23C14/5806 ,  C23C14/5826 ,  H01J37/32082 ,  H01J37/32146 ,  H01J37/32165 ,  H01L21/67207

摘要： The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

摘要翻译： 本发明通常提供适于在衬底上形成高质量电介质栅极层的方法和装置。 实施例考虑了一种方法，其中使用金属等离子体处理工艺代替标准氮化工艺以在衬底上形成高介电常数层。 实施例进一步考虑了一种适于“植入”相对较低能量的金属离子的装置，以便减少对诸如二氧化硅层的栅极介电层的离子轰击损伤，并避免将金属原子并入到下面的硅中。 通常，该方法包括以下步骤：形成高k电介质，然后终止沉积的高k材料的表面，以在栅电极和高k电介质材料之间形成良好的界面。 本发明的实施例还提供一种簇工具，其适于形成高k电介质材料，终止高k电介质材料的表面，执行任何期望的后处理步骤，并形成多晶硅和/或金属栅极层。

公开(公告)号：US20070245961A1

公开(公告)日：2007-10-25

申请号：US11410781

申请日：2006-04-24

申请人： Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

发明人： Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

IPC分类号： C23C16/00

CPC分类号： H01J37/32174 ,  H01J37/32091 ,  H01J37/321 ,  H01J37/32165

摘要： A method of processing a workpiece in the chamber of a plasma reactor includes introducing a process gas into the chamber, simultaneously (a) capacitively coupling VHF plasma source power into a process region of the chamber that overlies the wafer, and (b) inductively coupling RF plasma source power into the process region, and controlling dissociation of species in the process region by controlling the effective frequency of the VHF source power. In a preferred embodiment, the step of coupling VHF source power is performed by coupling VHF source power from different generators having different VHF frequencies, and the step of controlling the effective frequency is performed by controlling the ratio of power coupled by the different generators.

摘要翻译： 在等离子体反应器的腔室中处理工件的方法包括将工艺气体引入到腔室中，同时（a）将VHF等离子体源功率电容耦合到覆盖在晶片上的腔室的工艺区域中，以及（b）电感耦合 RF等离子体源功率进入过程区域，并通过控制VHF源功率的有效频率来控制处理区域中物种的离解。 在优选实施例中，通过耦合具有不同VHF频率的不同发生器的VHF源功率来执行耦合VHF源功率的步骤，并且通过控制由不同发生器耦合的功率比来执行控制有效频率的步骤。

公开(公告)号：US20050241762A1

公开(公告)日：2005-11-03

申请号：US11060980

申请日：2005-02-18

申请人： Alexander Paterson ,  Elizabeth Pavel ,  Valentin Todorow ,  Huong Nguyen ,  Thomas Kropewnicki ,  Brian Hatcher ,  John Holland

发明人： Alexander Paterson ,  Elizabeth Pavel ,  Valentin Todorow ,  Huong Nguyen ,  Thomas Kropewnicki ,  Brian Hatcher ,  John Holland

IPC分类号： C23F1/00 ,  H01J37/32 ,  H01L21/3065

CPC分类号： H01J37/32091 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32146 ,  H01J37/32165

摘要： Embodiments of the invention generally provide etch or CVD plasma processing methods and apparatus used to generate a uniform plasma across the surface of a substrate by modulation pulsing the power delivered to a plurality of plasma controlling devices found in a plasma processing chamber. The plasma generated and/or sustained in the plasma processing chamber is created by the one or more plasma controlling devices that are used to control, generate, enhance, and/or shape the plasma during the plasma processing steps by use of energy delivered from a RF power source. Plasma controlling devices may include, for example, one or more coils (inductively coupled plasma), one or more electrodes (capacitively coupled plasma), and/or any other energy inputting device such as a microwave source.

摘要翻译： 本发明的实施例通常提供蚀刻或CVD等离子体处理方法和装置，用于通过调制脉冲输送到在等离子体处理室中发现的多个等离子体控制装置的功率来在衬底的表面上产生均匀的等离子体。 在等离子体处理室中产生和/或维持的等离子体是由一个或多个等离子体控制装置产生的，这些等离子体控制装置用于在等离子体处理步骤期间通过使用从等离子体处理室输送的能量来控制，产生，增强和/或形成等离子体 射频电源。 等离子体控制装置可以包括例如一个或多个线圈（电感耦合等离子体），一个或多个电极（电容耦合等离子体）和/或任何其它能量输入装置，例如微波源。

公开(公告)号：US08956500B2

公开(公告)日：2015-02-17

申请号：US11739428

申请日：2007-04-24

申请人： Stephen Yuen ,  Kyeong-Tae Lee ,  Valentin Todorow ,  Tae Won Kim ,  Anisul Khan ,  Shashank Deshmukh

发明人： Stephen Yuen ,  Kyeong-Tae Lee ,  Valentin Todorow ,  Tae Won Kim ,  Anisul Khan ,  Shashank Deshmukh

IPC分类号： C23C16/00 ,  H01L21/306 ,  H01J37/32

CPC分类号： H01J37/321

摘要： An inductively-coupled plasma processing chamber has a chamber with a ceiling. A first and second antenna are placed adjacent to the ceiling. The first antenna is concentric to the second antenna. A plasma source power supply is coupled to the first and second antenna. The plasma source power supply generates a first RF power to the first antenna, and a second RF power to the second antenna. A substrate support disposed within the chamber. The size of the first antenna and a distance between the substrate support are such that the etch rate of the substrate on the substrate support is substantially uniform.

摘要翻译： 电感耦合等离子体处理室具有带天花板的室。 第一和第二天线放置在天花板附近。 第一天线与第二天线同心。 等离子体源电源耦合到第一和第二天线。 等离子体源电源向第一天线产生第一RF功率，并向第二天线产生第二RF功率。 设置在室内的衬底支撑件。 第一天线的尺寸和衬底支撑件之间的距离使得衬底支撑件上的衬底的蚀刻速率基本上是均匀的。

公开(公告)号：US08633423B2

公开(公告)日：2014-01-21

申请号：US13097822

申请日：2011-04-29

申请人： Xing Lin ,  Douglas A. Buchberger, Jr. ,  Xiaoping Zhou ,  Valentin Todorow ,  Andrew Nguyen ,  Anchel Sheyner

发明人： Xing Lin ,  Douglas A. Buchberger, Jr. ,  Xiaoping Zhou ,  Valentin Todorow ,  Andrew Nguyen ,  Anchel Sheyner

IPC分类号： H05B1/00 ,  H01L21/683

CPC分类号： H05B6/105 ,  H01L21/67109 ,  H01L21/6831

摘要： Methods and apparatus for controlling the temperature of a substrate during processing are provided herein. In some embodiments, an apparatus for retaining and controlling substrate temperature may include a puck of dielectric material; an electrode disposed in the puck proximate a surface of the puck upon which a substrate is to be retained; and a plurality of heater elements disposed in the puck and arranged in concentric rings to provide independent temperature control zones.

摘要翻译： 本文提供了在处理期间控制基板的温度的方法和装置。 在一些实施例中，用于保持和控制衬底温度的装置可以包括电介质材料的圆盘; 设置在靠近所述圆盘的表面的所述圆盘中的电极，待保持基板的电极; 以及多个加热器元件，其布置在圆盘中并且布置成同心环以提供独立的温度控制区。

公开(公告)号：US20070245960A1

公开(公告)日：2007-10-25

申请号：US11410773

申请日：2006-04-24

申请人： Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

发明人： Alexander Paterson ,  Valentin Todorow ,  Theodoros Panagopoulos ,  Brian Hatcher ,  Dan Katz ,  Edward Hammond ,  John Holland ,  Alexander Matyushkin

IPC分类号： C23C16/00

CPC分类号： H01J37/32137 ,  H01J37/32091 ,  H01J37/321

摘要： A method of processing a workpiece in the chamber of a plasma reactor includes introducing a process gas into the chamber, capacitively coupling VHF plasma source power into a process region of the chamber that overlies the wafer while inductively coupling RF plasma source power into the process region. A particular plasma ion density level is established by maintaining the total amount of plasma source power inductively and capacitively coupled into the chamber at a level that provides the desired plasma ion density. Chemical species distribution or content in the process region plasma is controlled by adjusting the ratio between the amounts of the capacitively coupled power and the inductively coupled power while continuing to maintain the level of total plasma source power. The method further includes applying independently adjustable LF bias power and HF bias power to the workpiece and adjusting the average value and population distribution of ion energy at the surface of the workpiece by adjusting the proportion between the LF and HF bias powers.

摘要翻译： 在等离子体反应器的腔室中处理工件的方法包括将工艺气体引入室中，将VHF等离子体源功率电容耦合到层叠在晶片上的室的处理区域，同时将RF等离子体源功率感应耦合到工艺区域 。 通过将等离子体源功率的总量以感应和电容耦合到腔室中的水平提供期望的等离子体离子密度来建立特定的等离子体离子密度水平。 通过调节电容耦合功率和电感耦合功率之间的比例来控制处理区域等离子体中的化学物质分布或含量，同时继续保持总等离子体源功率的水平。 该方法还包括对工件应用独立可调的LF偏置功率和HF偏置功率，并通过调整LF和HF偏置功率之间的比例来调节工件表面处的离子能量的平均值和总体分布。