Data bus driver with electrical energy dump

    公开(公告)号:US11455265B2

    公开(公告)日:2022-09-27

    申请号:US17187427

    申请日:2021-02-26

    Applicant: Apple Inc.

    Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

    DATA BUS DRIVER WITH ELECTRICAL ENERGY DUMP

    公开(公告)号:US20210182226A1

    公开(公告)日:2021-06-17

    申请号:US17187427

    申请日:2021-02-26

    Applicant: Apple Inc.

    Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

    Data bus driver with electrical energy dump

    公开(公告)号:US10963410B2

    公开(公告)日:2021-03-30

    申请号:US15974635

    申请日:2018-05-08

    Applicant: Apple Inc.

    Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

    High Output Impedance Audio Amplifier For Noise Rejection

    公开(公告)号:US20200107135A1

    公开(公告)日:2020-04-02

    申请号:US16144218

    申请日:2018-09-27

    Applicant: Apple Inc.

    Abstract: A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.

    Electrical power converter and detachable energy storage reservoir

    公开(公告)号:US10283989B1

    公开(公告)日:2019-05-07

    申请号:US15884092

    申请日:2018-01-30

    Applicant: Apple Inc.

    Abstract: A power converter provides a first output voltage and a second output voltage in accordance with a control input, wherein the first output voltage is higher than the second output voltage. A switch that is series coupled between i) an energy reservoir node and ii) a power supply node or a power return node. A charge maintenance circuit is coupled to the energy reservoir node, and when the switch is closed can maintain a selected amount of charge in or a selected voltage across an energy reservoir element that may be coupled to the energy reservoir node. Other aspects are also described and claimed.

    Digital transducer circuit
    27.
    发明授权

    公开(公告)号:US10212500B2

    公开(公告)日:2019-02-19

    申请号:US15418395

    申请日:2017-01-27

    Applicant: Apple Inc.

    Abstract: An analog to digital conversion circuit receives a transducer output signal and outputs a data bitstream, where a latch or flip flop has an input that receives a clock signal. An AC-DC power converter receives the clock signal and produces a DC voltage which may power the analog to digital conversion circuit. The AC-DC power converter has a rectifier, an energy store and a voltage regulator, charge pump or filter, which draws power from the energy store to produce the DC voltage. A control circuit delays replenishment of the energy store by the rectified clock signal, responsive to the clock signal. Other embodiments are also described and claimed.

    Digital Transducer Circuit
    28.
    发明申请

    公开(公告)号:US20180220214A1

    公开(公告)日:2018-08-02

    申请号:US15418395

    申请日:2017-01-27

    Applicant: Apple Inc.

    CPC classification number: H04R1/04 H04R3/00 H04R3/007 H04R19/04

    Abstract: An analog to digital conversion circuit receives a transducer output signal and outputs a data bitstream, where a latch or flip flop has an input that receives a clock signal. An AC-DC power converter receives the clock signal and produces a DC voltage which may power the analog to digital conversion circuit. The AC-DC power converter has a rectifier, an energy store and a voltage regulator, charge pump or filter, which draws power from the energy store to produce the DC voltage. A control circuit delays replenishment of the energy store by the rectified clock signal, responsive to the clock signal. Other embodiments are also described and claimed.

    Interference-Insensitive Capacitive Displacement Sensing

    公开(公告)号:US20180038834A1

    公开(公告)日:2018-02-08

    申请号:US15417962

    申请日:2017-01-27

    Applicant: Apple Inc.

    CPC classification number: G01D5/24 G01R27/00

    Abstract: An excitation signal is produced on a plate of an unknown capacitor and on a plate of a known capacitor. The excitation signal is amplified over time to produce a first output signal, with gain that is proportional to capacitance of the unknown capacitor. The excitation signal is also amplified over time to produce a second output signal, with gain that is proportional to capacitance of the known capacitor. Capacitance of the unknown capacitor is computed using a mathematical function of the first and second output signals and the capacitance of the known capacitor, while being insensitive to amplitude of the excitation signal. Other embodiments are also described and claimed.

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