CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY
    21.
    发明申请
    CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY 有权
    非线性存储器中的通道擦除的控制位线放电

    公开(公告)号:US20090119447A1

    公开(公告)日:2009-05-07

    申请号:US11935717

    申请日:2007-11-06

    Abstract: Systems and/or methods that facilitate discharging bit lines (BL) associated with memory arrays in nonvolatile memory at a controlled rate are presented. A discharge component facilitates discharging the BL at a desired rate thus preventing the “hot switching” phenomenon from occurring within a y-decoder component(s) associated with the nonvolatile memory. The discharge component can be comprised of, in part, a discharge transistor component that controls the rate of BL discharge wherein the gate voltage of the discharge transistor component can be controlled by a discharge controller component. The rate of BL discharge can be determined by the size of discharge transistor component used in the design, the strength and/or size of the y-decoder component, the number of erase errors that occur for a particular memory device, and/or other factors in order to facilitate preventing hot switching from occurring.

    Abstract translation: 提出了有助于以受控的速率放电与非易失性存储器中的存储器阵列相关联的位线(BL)的系统和/或方法。 放电元件有助于以期望的速率放电BL,从而防止在与非易失性存储器相关联的y解码器组件内发生“热切换”现象。 放电部件可以部分地由控制BL放电速率的放电晶体管部件组成,其中放电晶体管部件的栅极电压可以由放电控制器部件控制。 BL放电的速率可以由设计中使用的放电晶体管组件的大小,y解码器组件的强度和/或尺寸,特定存储器件发生的擦除错误的数量和/或其他 因素,以便于防止发生热切换。

    Embedded Video Playlists
    22.
    发明申请
    Embedded Video Playlists 有权
    嵌入式视频播放列表

    公开(公告)号:US20090024927A1

    公开(公告)日:2009-01-22

    申请号:US11779832

    申请日:2007-07-18

    Abstract: A system, method and various user interfaces provide an embedded web-based video player for navigating video playlists and playing video content. A website publisher can create and store a video player with customized parameters (e.g., player type, appearance, advertising options, etc.) and can associate the player with a playlist of selected videos. The stored video player is associated with a player ID in a player database and can be embedded in a website using an embed code referencing the player ID. A user interface for the embedded player provides controls for controlling video playback and for controlling the selection of a video from the playlist.

    Abstract translation: 系统,方法和各种用户界面提供用于导航视频播放列表和播放视频内容的嵌入式基于网络的视频播放器。 网站发布商可以创建并存储具有定制参数(例如,玩家类型,外观,广告选项等)的视频播放器,并且可以将玩家与所选视频的播放列表相关联。 存储的视频播放器与播放器数据库中的播放器ID相关联,并且可以使用引用播放器ID的嵌入代码嵌入到网站中。 用于嵌入式播放器的用户界面提供用于控制视频播放和控制从播放列表中选择视频的控制。

    COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES
    23.
    发明申请
    COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES 有权
    用于实现闪存存储器件的均匀编程速度的补偿方法

    公开(公告)号:US20080316830A1

    公开(公告)日:2008-12-25

    申请号:US11767622

    申请日:2007-06-25

    CPC classification number: G11C16/30 G11C16/10

    Abstract: Systems and methodologies are provided herein for increasing operation speed uniformity in a flash memory device. Due to the characteristics of a typical flash memory array, memory cells in a memory array may experience distributed substrate resistance that increases as the distance of the memory cell from an edge of the memory array increases. This difference in distributed substrate resistance can vary voltages supplied to different memory cells in the memory array depending on their location, which can in turn cause non-uniformity in the speed of high voltage operations on the memory array such as programming. The systems and methodologies provided herein reduce this non-uniformity in operation speed by providing compensated voltage levels to memory cells in a memory array based at least in part on the location of each respective memory cell. For example, a compensated operation voltage can be provided that is higher near the center of the memory array and lower near an edge of the memory array, thereby lessening the effect of distributed substrate resistance and providing increased operation speed uniformity throughout the memory array.

    Abstract translation: 本文提供的系统和方法用于提高闪存设备中的操作速度均匀性。 由于典型的闪存阵列的特征,存储器阵列中的存储器单元可能经历分布式衬底电阻,随着存储器单元与存储器阵列的边缘的距离增加而增加。 分布式基板电阻的这种差异可以根据其位置改变提供给存储器阵列中的不同存储单元的电压,这进而导致存储器阵列上的高电压操作的速度(例如编程)的不一致。 本文提供的系统和方法通过至少部分地基于每个相应存储器单元的位置,通过向存储器阵列中的存储器单元提供补偿的电压电平来降低操作速度的不均匀性。 例如,可以提供补偿操作电压,其在存储器阵列的中心附近较高,并且在存储器阵列的边缘附近较低,从而减小分布式衬底电阻的影响并且提供整个存储器阵列中的增加的操作速度均匀性。

    FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
    24.
    发明申请
    FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY 有权
    具有外部高压电源的闪存存储器件

    公开(公告)号:US20080151639A1

    公开(公告)日:2008-06-26

    申请号:US11613383

    申请日:2006-12-20

    CPC classification number: G11C16/12

    Abstract: A semiconductor memory device (104) selectably connectable to an external high voltage power supply (122) is provided. The semiconductor memory device (104) includes a switch (314), a detector (316) and a timing device (318). The switch (314) is connected to external voltage supply signals and selectably couples the external voltage supply signals to memory cells (305) of the semiconductor memory device (104) for memory operations thereof. The external voltage supply signals including a high voltage signal (412) provided from the external high voltage power supply (122) and an operational voltage signal Vcc (402). The detector (316) is connected to the external voltage supply signals for generating a timer activation signal (404) in response to detecting an operational voltage power-on period. The timing device (318) signals the switch (314) to decouple the high voltage signal (412) and the operational voltage signal (402) from the memory cells (305) in response to the timer activation signal (404) and to recouple the high voltage signal (412) and the operational voltage signal (402) to the memory cells (305) a time delay interval thereafter. The time delay interval is determined in response to the high voltage signal (412).

    Abstract translation: 提供可选择地连接到外部高压电源(122)的半导体存储器件(104)。 半导体存储器件(104)包括开关(314),检测器(316)和定时装置(318)。 开关(314)连接到外部电压源信号,并且可选择地将外部电压供应信号耦合到半导体存储器件(104)的存储单元(305),用于存储器操作。 包括从外部高压电源(122)提供的高电压信号(412)的外部电压供给信号和操作电压信号Vcc(402)。 检测器(316)连接到外部电压源信号,以响应于检测到工作电压通电周期而产生定时器激活信号(404)。 定时装置(318)响应于定时器启动信号(404),向开关314通知高压信号412和操作电压信号402与存储单元305的耦合, 高电压信号(412)和操作电压信号(402)到其后的时间延迟区间。 响应于高电压信号确定时间延迟间隔(412)。

    Voltage regulator with less overshoot and faster settling time
    25.
    发明授权
    Voltage regulator with less overshoot and faster settling time 有权
    电压调节器具有较少的过冲和更快的建立时间

    公开(公告)号:US07352626B1

    公开(公告)日:2008-04-01

    申请号:US11212614

    申请日:2005-08-29

    CPC classification number: G11C5/14

    Abstract: A voltage regulator may include an operational-amplifier section, a capacitor connected to an output of the operational-amplifier section, and a switch configured to connect the capacitor to a voltage supply. The switch is configured to charge the capacitor before activating the operational-amplifier section. The capacitor is configured to store charge to supplement current being supplied from the operational-amplifier section. The voltage regulator may be used to supply power to non-volatile memory cells.

    Abstract translation: 电压调节器可以包括运算放大器部分,连接到运算放大器部分的输出的电容器和被配置为将电容器连接到电压源的开关。 开关被配置为在激活运算放大器部分之前对电容器充电。 电容器被配置为存储电荷以补充从运算放大器部分提供的电流。 电压调节器可以用于向非易失性存储单元供电。

    Flash memory device having improved program rate
    26.
    发明授权
    Flash memory device having improved program rate 有权
    闪存设备具有改进的编程速率

    公开(公告)号:US07307878B1

    公开(公告)日:2007-12-11

    申请号:US11212850

    申请日:2005-08-29

    CPC classification number: G11C16/0475 G11C16/3454 G11C16/3459

    Abstract: A method is provided for programming a nonvolatile memory device including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes receiving a programming window that identifies a plurality of memory cells in the array. A first group of memory cells to be programmed is identified from the plurality of memory cells in the programming window. The first group of memory cells is programmed and a programming state of the first group of memory cells is verified.

    Abstract translation: 提供了一种用于对包括存储器单元阵列的非易失性存储器件进行编程的方法,其中每个存储器单元包括衬底,控制栅极,电荷存储元件,源极区域和漏极区域。 该方法包括接收标识阵列中的多个存储单元的编程窗口。 在编程窗口中从多个存储器单元识别要编程的第一组存储器单元。 第一组存储器单元被编程,并且验证第一组存储器单元的编程状态。

    Hierarchical system and method for on-demand loading of data in a navigation system
    27.
    发明授权
    Hierarchical system and method for on-demand loading of data in a navigation system 有权
    用于在导航系统中按需加载数据的分层系统和方法

    公开(公告)号:US07305396B2

    公开(公告)日:2007-12-04

    申请号:US10334240

    申请日:2002-12-31

    Abstract: A system providing three-dimensional visual navigation for a mobile unit includes a location calculation unit for calculating an instantaneous position of the mobile unit, a viewpoint control unit for determining a viewing frustum from the instantaneous position, a scenegraph manager in communication with at least one geo-database to obtain geographic object data associated with the viewing frustum and generating a scenegraph organizing the geographic object data, and a scenegraph renderer which graphically renders the scenegraph in real time. To enhance depiction, a method for blending images of different resolutions in the scenegraph reduces abrupt changes as the mobile unit moves relative to the depicted geographic objects. Data structures for storage and run-time access of information regarding the geographic object data permit on-demand loading of the data based on the viewing frustum and allow the navigational system to dynamically load, on-demand, only those objects that are visible to the user.

    Abstract translation: 一种为移动单元提供三维视觉导航的系统包括用于计算移动单元的瞬时位置的位置计算单元,用于从瞬时位置确定观看平截头体的视点控制单元,与至少一个 地理数据库,以获得与观察平截头体相关联的地理对象数据并生成组织地理对象数据的场景图,以及以图形方式实时渲染场景图的场景渲染器。 为了增强描绘,用于在场景图中混合不同分辨率的图像的方法减少了随着移动单元相对于所描绘的地理对象移动而的突然变化。 用于存储和运行时访问关于地理对象数据的信息的数据结构允许基于查看平截头体的数据的按需加载,并允许导航系统按需地动态地加载那些对于 用户。

    CUSTOMIZABLE MATTRESS TOPPER SYSTEM
    28.
    发明申请
    CUSTOMIZABLE MATTRESS TOPPER SYSTEM 有权
    可定制MATTRESS TOPPER系统

    公开(公告)号:US20060260060A1

    公开(公告)日:2006-11-23

    申请号:US11163690

    申请日:2005-10-27

    CPC classification number: A47C27/05 A47C27/144 A47C27/146 A47C27/15

    Abstract: A customizable mattress topper system includes a first mattress topper of viscoelastic foam with a shaped top surface and a second foam mattress topper. The viscoelastic foam topper has a higher density than the second topper. The first mattress topper and second mattress topper are packaged and sold together as a system. The first mattress topper may be placed over the second mattress topper, or vice versa, and in various orientations over a bedding mattress as desired by a consumer to customize the level of cushioning support.

    Abstract translation: 可定制的床垫打顶系统包括具有成形顶表面的粘弹性泡沫的第一床垫顶部和第二泡沫床垫顶盖。 粘弹性泡沫打包机具有比第二打包机更高的密度。 第一个床垫打顶机和第二个床垫打包机作为系统一起打包和出售。 第一床垫打顶器可以放置在第二床垫打顶器上,反之亦然,并且按照消费者的需要定制缓冲支撑件的水平,按照床垫床垫的各种取向。

    Customizable mattress topper system
    29.
    发明申请
    Customizable mattress topper system 审中-公开
    可定制的床垫打顶系统

    公开(公告)号:US20060260059A1

    公开(公告)日:2006-11-23

    申请号:US11132868

    申请日:2005-05-19

    CPC classification number: A47C27/05 A47C27/144 A47C27/146 A47C27/15

    Abstract: A customizable mattress topper system includes a first mattress topper of viscoelastic foam with a shaped top surface and a second foam mattress topper. The viscoelastic foam topper has a higher density than the second topper. The first mattress topper and second mattress topper are packaged and sold together as a system. The first mattress topper may be placed over the second mattress topper, or vice versa, and in various orientations over a bedding mattress as desired by a consumer to customize the level of cushioning support.

    Abstract translation: 可定制的床垫打顶系统包括具有成形顶表面的粘弹性泡沫的第一床垫顶部和第二泡沫床垫顶盖。 粘弹性泡沫打包机具有比第二打包机更高的密度。 第一个床垫打顶机和第二个床垫打包机作为系统一起打包和出售。 第一床垫打顶器可以放置在第二床垫打顶器上,反之亦然,并且按照消费者的需要定制缓冲支撑件的水平,按照床垫床垫的各种取向。

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