Abstract:
A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate. Similarly, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., sequencing data, turn-on data, etc.), to determine (or calculate) a period of time to wait (e.g., delay period) before the output is generated. In other words, output-timing data can be used to produce a series of outputs in a particular order, or sequence.
Abstract:
A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.
Abstract:
A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2−(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2nm-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle. The pulse width modulated signal is used by a switching power supply circuit to control at least one power switching device.
Abstract:
A switched mode voltage regulator has a digital control system that includes dual digital control loops. The voltage regulator comprises at least one power switch adapted to convey power between respective input and output terminals of the voltage regulator and a digital controller adapted to control operation of the power switches responsive to an output of the voltage regulator. The digital controller further comprises dual digital control loops in which a first control loop provides high speed with lower regulation accuracy and a second control loop has high accuracy with lower speed. Thus, the digital control system provides the advantages of both high speed and high regulation accuracy.
Abstract:
A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate. Similarly, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., sequencing data, turn-on data, etc.), to determine (or calculate) a period of time to wait (e.g., delay period) before the output is generated. In other words, output-timing data can be used to produce a series of outputs in a particular order, or sequence.
Abstract:
A micro gamma camera having several gamma radiation detection devices adjacent to each other. The detection devices are laid out above an information processing device that processes information output by the detection devices. Each of the detection devices includes: a plurality of detectors positioned adjacent to each other to form a detection plane; a first substrate including a detection plane polarizer and a first signal processor for processing the signal detected by the detection plane; a second substrate placed between the detection plane and the first substrate; a ground plane placed between the first and second substrates; and a third substrate including second and third signal processors.
Abstract:
The invention relates to a process for determining the position of an event with respect to a set of N photodetectors, comprising the following after digitization of the signal output by each photodetector: calculate an uncorrected position of the event, determine the distance of each photodetector from the uncorrected position, calculate a corrected value of the contribution of each photodetector as a function of the distance from P0, calculate a new position P1, as a function of the corrected contributions of the photodetectors and their position. Another purpose of the invention is a device for embodiment of the process.
Abstract:
Process for real time sorting of signals from several semi-conductor detection elements in which: a) during a calibration phase: amplitude data and signal rise time data are established for each event signal, a biparametric detection spectrum with amplitude and rise time data is acquired, a biparametric acceptance window corresponding respectively to an amplitude-rise time correlation is established, and b) during an examination phase: an amplitude, rise time data pair is established in real time for each event signal detected, the events are sorted in real time, selecting the signals according to whether their amplitude and rise time data are or are not within the window.
Abstract:
A system and method is provided for determining a voltage output of a programmable power converter based on programming voltage data received from one of a variety of alternate sources. Specifically, in one embodiment of the present invention, a control unit is adapted to monitor a digital data serial interface, a digital data parallel interface, and an analog data interface to determine whether programming voltage data has been received. If programming voltage data has been received, the data is used to determine an output voltage for the programmable power converter. If more than one set of programming voltage data has been received, a determination is made as to which set of data takes priority. The selected set of data is then used to determine an output voltage for the programmable power converter.
Abstract:
A system and method for providing interleaving point-of-load (POL) regulators such that each regulator's switching cycle is phase displaced with respect to those of other POL regulators in the array is disclosed. As a result, the aggregate input and/or output reflected ripple and noise of the input, output, or both is reduced. Each regulator in the array is associated with an unique address. A serial data-line writes the phase spacing programmed to each addressable POL regulator in the array. The present invention permits phase displacement of POL regulators without limitation to the input and output voltages of each of the regulators in the array. The array of POL regulators may also operate in a phase displaced mode with only a single control line. The need for separate controllers and multiple control lines is thereby eliminated.