中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

50 records (took 0.032 seconds)

    Memory system
    21.
    发明授权
    Memory system 有权
    内存系统

    公开(公告)号：US06285607B1

    公开(公告)日：2001-09-04

    申请号：US09647194

    申请日：2000-10-20

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G11C700

    CPC classification number: G11C29/88

    Abstract: A memory system (10) incorporating a plurality of memory devices (42) at least one of which has a defective location. Defects are mapped in a non-volatile memory (46). Data structures are divided into portions which are respectively stored in different ones of the memory devices (42). The controller (17) of the system accesses the non-volatile memory so as to generate on a per device basis an address corresponding to a non-defective location in that device. In this system, different addresses may therefore be applied to different ones of the devices (42) when a data structure is written to or read from the memory devices.

    Abstract translation: 一种内存有多个存储器件（42）的存储器系统（10），其中至少一个具有缺陷位置。 缺陷被映射到非易失性存储器（46）中。 数据结构分为存储在不同存储器件（42）中的部分。 系统的控制器（17）访问非易失性存储器，以便在每个设备的基础上生成对应于该设备中的无缺陷位置的地址。 因此，在该系统中，当将数据结构写入或从存储器件读取时，不同的地址因此可以应用于不同的设备（42）。

    Ring bus structure and its use in flash memory systems
    22.
    发明授权
    Ring bus structure and its use in flash memory systems 有权
    环形总线结构及其在闪存系统中的应用

    公开(公告)号：US08375146B2

    公开(公告)日：2013-02-12

    申请号：US10915039

    申请日：2004-08-09

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G06F15/16 ,  G06F15/177 ,  G06F15/173

    CPC classification number: G06F13/42

    Abstract: A system and integrated circuit chips used in the system utilize a bus in the form of a ring to interconnect nodes of individual components for transfer of data and commands therebetween. An example system described is a memory having one or more re-programmable non-volatile memory cell arrays connected to each other and to a system controller by a ring bus.

    Abstract translation: 在系统中使用的系统和集成电路芯片利用环形式的总线来互连各个组件的节点，以便在其间传输数据和命令。 所描述的示例系统是具有通过环形总线彼此连接和连接到系统控制器的一个或多个可重新编程的非易失性存储单元阵列的存储器。

    Logically-addressed file storage methods
    23.
    发明授权
    Logically-addressed file storage methods 有权
    逻辑寻址文件存储方法

    公开(公告)号：US07877540B2

    公开(公告)日：2011-01-25

    申请号：US11302764

    申请日：2005-12-13

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/26 ,  G06F9/34

    CPC classification number: G06F12/0246 ,  G06F3/0605 ,  G06F3/0643 ,  G06F3/0679 ,  G06F2212/7202

    Abstract: Files that are mapped to a logical address range by a host become logically fragmented prior to being sent to a memory system. Subsequently, the logically fragmented portions are reassembled when they are stored in blocks in the memory system. The host supplies information to the memory system regarding file-to-logical mapping of data prior to sending the data. The memory selects storage locations for the data based on the files to which the data belong.

    Abstract translation: 在发送到内存系统之前，由主机映射到逻辑地址范围的文件在逻辑上被分段。 随后，当逻辑碎片部分被存储在存储器系统中的块中时，被重新组装。 在发送数据之前，主机向存储器系统提供关于数据的文件到逻辑映射的信息。 存储器基于数据所属的文件选择数据的存储位置。

    Non-Volatile Memory And Method With Non-Sequential Update Block Management
    24.
    发明申请
    Non-Volatile Memory And Method With Non-Sequential Update Block Management 有权
    非易失性存储器和非顺序更新块管理方法

    公开(公告)号：US20090019218A1

    公开(公告)日：2009-01-15

    申请号：US12239489

    申请日：2008-09-26

    Applicant: Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

    Inventor： Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

    IPC: G06F12/02 ,  G06F12/00 ,  G06F12/06

    CPC classification number: G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

    Abstract: In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.

    Abstract translation: 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。

    Adaptive metablocks
    25.
    发明授权
    Adaptive metablocks 有权
    自适应元区块

    公开(公告)号：US07433993B2

    公开(公告)日：2008-10-07

    申请号：US10749189

    申请日：2003-12-30

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G06F12/00

    CPC classification number: G06F12/0246 ,  G06F2212/7207 ,  G06F2212/7208

    Abstract: In a memory system having multiple erase blocks in multiple planes, a selected number of erase blocks are programmed together as an adaptive metablock. The number of erase blocks in an adaptive metablock is chosen according to the data to be programmed. Logical address space is divided into logical groups, a logical group having the same size as one erase block. Adaptive logical blocks are formed from logical groups. One adaptive logical block is stored in one adaptive metablock.

    Abstract translation: 在具有多个平面中的多个擦除块的存储器系统中，所选数量的擦除块被编程在一起作为自适应元区块。 根据要编程的数据选择自适应元区块中的擦除块的数量。 逻辑地址空间被分成逻辑组，逻辑组具有与一个擦除块相同大小的逻辑组。 自适应逻辑块由逻辑组形成。 一个自适应逻辑块存储在一个自适应元区块中。

    Method and apparatus for maintaining data on non-volatile memory systems
    26.
    发明授权
    Method and apparatus for maintaining data on non-volatile memory systems 有权
    用于在非易失性存储器系统上维护数据的方法和装置

    公开(公告)号：US07395384B2

    公开(公告)日：2008-07-01

    申请号：US10897049

    申请日：2004-07-21

    Applicant: Alan Welsh Sinclair ,  Peter John Smith

    Inventor： Alan Welsh Sinclair ,  Peter John Smith

    IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

    CPC classification number: G06F12/0246 ,  G06F2212/7205 ,  Y10S707/99953 ,  Y10S707/99957

    Abstract: Techniques for managing data in a non-volatile memory system (e.g., Flash Memory) are disclosed. A controller can use information relating to a host's filing system, which is stored by the host on non-volatile memory, to determine if one or more clusters (or sectors with clusters) are currently allocated. The controller can use the information relating to the host's filing system to ensure that one or more clusters (or one or more sectors within a cluster) are not copied from one location to another location in the memory during a garbage collection cycle. As a result, some unnecessary operations (e.g., copying data) which are conventionally performed can be avoided and system performance can be enhanced.

    Abstract translation: 公开了用于在非易失性存储器系统（例如，闪存）中管理数据的技术。 控制器可以使用与由主机存储在非易失性存储器上的主机归档系统有关的信息来确定当前是否分配了一个或多个集群（或具有集群的扇区）。 控制器可以使用与主机归档系统相关的信息，以确保在垃圾收集周期期间，一个或多个集群（或集群内的一个或多个扇区）不会从一个位置复制到存储器中的另一个位置。 结果，可以避免常规执行的一些不必要的操作（例如复制数据），并且可以提高系统性能。

    Dual media storage device
    28.
    发明授权
    Dual media storage device 有权
    双媒体存储设备

    公开(公告)号：US07302534B2

    公开(公告)日：2007-11-27

    申请号：US11537404

    申请日：2006-09-29

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G06F12/00

    CPC classification number: G06F3/0685 ,  G06F1/3268 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0634 ,  G06F3/068 ,  G06F12/0866 ,  G06F2212/2022 ,  Y02D10/154

    Abstract: A dual media storage device is provided. Two separate non-volatile mass storage devices, one having a faster access time and a lower capacity than the other, are combined into a single system. A storage controller can direct the flow of data into one device or the other, depending upon various conditions, which might include one mass storage device being unavailable or for certain caching schemes.

    Abstract translation: 提供双媒体存储设备。 两个独立的非易失性大容量存储设备，一个具有更快的访问时间和一个比另一个更低的容量，被组合成单个系统。 根据可能包括一个大容量存储设备不可用或某些高速缓存方案的各种条件，存储控制器可以将数据流引导到一个设备或另一个设备中。

    Non-volatile memory with scheduled reclaim operations
    30.
    发明授权
    Non-volatile memory with scheduled reclaim operations 有权
    具有预定回收操作的非易失性存储器

    公开(公告)号：US07984084B2

    公开(公告)日：2011-07-19

    申请号：US11259439

    申请日：2005-10-25

    Applicant: Alan Welsh Sinclair

    Inventor： Alan Welsh Sinclair

    IPC: G06F7/00 ,  G06F17/30

    CPC classification number: G06F17/30218 ,  G06F3/0605 ,  G06F3/0608 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0643 ,  G06F3/0644 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7205 ,  G11C16/0483 ,  G11C16/102

    Abstract: In a non-volatile memory array, scheduling of reclaim operations to occur before a shortage of erased blocks arises avoids extended periods of reclaim that could exceed a time limit. A memory controller uses information regarding the data stored in the memory array to estimate the additional host data that may be programmed and the reclaim operations to be performed and schedules the reclaim operations to be evenly distributed between write operations until the memory is full.

    Abstract translation: 在非易失性存储器阵列中，在擦除块的不足之前发生的回收操作的调度避免了可能超过时间限制的延长的回收期。 存储器控制器使用关于存储在存储器阵列中的数据的信息来估计可编程的附加主机数据和要执行的回收操作，并且将回收操作调度为在写操作之间均匀分布，直到存储器已满。

Patent Agency Ranking