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    HIGH SPEED DISPLAY INTERFACE
    21.
    发明申请
    HIGH SPEED DISPLAY INTERFACE 有权
    高速显示界面

    公开(公告)号：US20160275905A1

    公开(公告)日：2016-09-22

    申请号：US14661723

    申请日：2015-03-18

    Applicant: APPLE INC.

    Inventor： Paolo Sacchetto ,  David W. Lum ,  Christopher P. Tann ,  Guy Cote ,  Chaohao Wang ,  Sandro H. Pintz

    IPC: G09G5/00

    CPC classification number: G09G5/006 ,  G09G2330/021 ,  G09G2340/02 ,  G09G2340/0435 ,  G09G2350/00 ,  G09G2370/10

    Abstract: Methods and devices employing circuitry for dynamically adjusting bandwidth control of a display interface are provided. The display interface or image content is dynamically adjusted to support both high-speed image data (e.g., 120 Hz image data) and lower-speed content (e.g., 60 Hz content). For example, in some embodiments, additional pixel pipelines and/or processing lanes may be activated during the rendering of high-speed image data, but not during the rendering of low-speed image data. Additionally or alternatively, high-speed image data, but not low-speed data, may be compressed to render high-speed content over an interface that supports only low-speed content.

    Abstract translation: 提供了采用用于动态调整显示接口的带宽控制的电路的方法和设备。 显示界面或图像内容被动态地调整以支持高速图像数据（例如，120Hz图像数据）和较低速度内容（例如，60Hz内容）。 例如，在一些实施例中，在渲染高速图像数据期间可以激活附加的像素管线和/或处理通道，但是在呈现低速图像数据期间不会激活。 另外或替代地，高速图像数据而不是低速数据可以被压缩以通过仅支持低速内容的接口呈现高速内容。

    Systems and methods for statistics collection using clipped pixel tracking
    23.
    发明授权
    Systems and methods for statistics collection using clipped pixel tracking 有权
    使用剪辑像素跟踪进行统计收集的系统和方法

    公开(公告)号：US09342858B2

    公开(公告)日：2016-05-17

    申请号：US14023359

    申请日：2013-09-10

    Applicant: APPLE INC.

    Inventor： Guy Cote ,  D. Amnon Silverstein ,  Suk Hwan Lim

    IPC: G06K9/00 ,  G06T1/20 ,  H04N17/00

    CPC classification number: G06T1/20 ,  H04N17/002

    Abstract: Systems and methods are provided for selectively performing image statistics processing based at least partly on whether a pixel has been clipped. In one example, an image signal processor may include statistics collection logic. The statistics collection logic may include statistics image processing logic and a statistics core. The statistics image processing logic may perform initial image processing on image pixels, at least occasionally causing some of the image pixels to become clipped. The statistics core may obtain image statistics from the image pixels. The statistics core may obtain at least one of the image statistics using only pixels that have not been clipped and excluding pixels that have been clipped.

    Abstract translation: 系统和方法被提供用于至少部分地基于是否已经剪切像素来选择性地执行图像统计处理。 在一个示例中，图像信号处理器可以包括统计信息收集逻辑。 统计信息采集逻辑可以包括统计图像处理逻辑和统计核心。 统计图像处理逻辑可以对图像像素执行初始图像处理，至少偶尔导致一些图像像素被削波。 统计核心可以从图像像素获取图像统计。 统计核心可以仅使用未被裁剪的像素并且排除已经被裁剪的像素来获得至少一个图像统计信息。

    Processing order in block processing pipelines
    24.
    发明授权
    Processing order in block processing pipelines 有权
    块处理流程中的处理顺序

    公开(公告)号：US09218639B2

    公开(公告)日：2015-12-22

    申请号：US14039820

    申请日：2013-09-27

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Mark P. Rygh ,  Timothy John Millet ,  Jim C. Chou ,  Joseph J. Cheng

    IPC: G06T15/00 ,  G06T1/20 ,  H04N19/61 ,  H04N19/423 ,  H04N19/436

    CPC classification number: G06T1/20 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61

    Abstract: A knight's order processing method for block processing pipelines in which the next block input to the pipeline is taken from the row below and one or more columns to the left in the frame. The knight's order method may provide spacing between adjacent blocks in the pipeline to facilitate feedback of data from a downstream stage to an upstream stage. The rows of blocks in the input frame may be divided into sets of rows that constrain the knight's order method to maintain locality of neighbor block data. Invalid blocks may be input to the pipeline at the left of the first set of rows and at the right of the last set of rows, and the sets of rows may be treated as if they are horizontally arranged rather than vertically arranged, to maintain continuity of the knight's order algorithm.

    Abstract translation: 一种用于块处理管线的骑士订单处理方法，其中从管线的下一个块输入下一个块，并且在该帧中从左侧获取一个或多个列。 骑士的订单方法可以在管道中的相邻块之间提供间隔，以便于数据从下游阶段到上游阶段的反馈。 输入帧中的块行可以被划分为限制骑士命令方法以维持相邻块数据的位置的行的集合。 无效的块可以被输入到第一组行的左侧和最后一组行的右侧的流水线，并且这些行的集合可以被视为水平排列而不是垂直排列，以保持连续性 的骑士秩序算法。

    RAW SCALER WITH CHROMATIC ABERRATION CORRECTION
    25.
    发明申请
    RAW SCALER WITH CHROMATIC ABERRATION CORRECTION 审中-公开
    原始尺寸调节器

    公开(公告)号：US20150341604A1

    公开(公告)日：2015-11-26

    申请号：US14679126

    申请日：2015-04-06

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Simon Wolfenden Butler ,  Joseph Anthony Petolino, JR. ,  Joseph P. Bratt

    IPC: H04N9/04 ,  H04N9/64

    Abstract: Systems and methods for down-scaling are provided. In one example, a method for processing image data includes determining a plurality of output pixel locations using a position value stored by a position register, using the current position value to select a center input pixel from the image data and selecting an index value, selecting a set of input pixels adjacent to the center input pixel, selecting a set of filtering coefficients from a filter coefficient lookup table using the index value, filtering the set of source input pixels to apply a respective one of the set of filtering coefficients to each of the set of source input pixels to determine an output value for the current output pixel at the current position value, and correcting chromatic aberrations in the set of source input pixels.

    Abstract translation: 提供了缩小比例的系统和方法。 在一个示例中，用于处理图像数据的方法包括使用位置寄存器存储的位置值来确定多个输出像素位置，使用当前位置值从图像数据中选择中心输入像素并选择索引值，选择 与中心输入像素相邻的一组输入像素，使用索引值从滤波器系数查找表中选择一组滤波系数，对源输入像素组进行滤波，以将滤波系数集合中的相应一个应用于 所述源输入像素的集合以确定当前位置值处的当前输出像素的输出值，以及校正所述源输入像素集合中的色差。

    Display Pipe Statistics Calculation for Video Encoder
    26.
    发明申请
    Display Pipe Statistics Calculation for Video Encoder 有权
    显示管道统计计算视频编码器

    公开(公告)号：US20150255047A1

    公开(公告)日：2015-09-10

    申请号：US14201421

    申请日：2014-03-07

    Applicant: Apple Inc.

    Inventor： Peter F. Holland ,  Guy Cote ,  Mark P. Rygh

    IPC: G09G5/39 ,  G09G5/02

    CPC classification number: G09G5/39 ,  G09G5/001 ,  G09G5/022 ,  G09G5/363 ,  G09G2340/02 ,  G09G2340/06 ,  G09G2340/10 ,  G09G2340/12 ,  G09G2360/121 ,  G09G2360/128 ,  G09G2360/16

    Abstract: In an embodiment, a system includes a display processing unit configured to process a video sequence for a target display. In some embodiments, the display processing unit is configured to composite the frames from frames of the video sequence and one or more other image sources. The display processing unit may be configured to write the processed/composited frames to memory, and may also be configured to generate statistics over the frame data, where the generated statistics are usable to encode the frame in a video encoder. The display processing unit may be configured to write the generated statistics to memory, and the video encoder may be configured to read the statistics and the frames. The video encoder may be configured to encode the frame responsive to the statistics.

    Abstract translation: 在一个实施例中，系统包括被配置为处理用于目标显示的视频序列的显示处理单元。 在一些实施例中，显示处理单元被配置为从视频序列的帧和一个或多个其它图像源合成帧。 显示处理单元可以被配置为将经处理/合成的帧写入存储器，并且还可以被配置为生成关于帧数据的统计信息，其中生成的统计信息可用于对视频编码器中的帧进行编码。 显示处理单元可以被配置为将生成的统计信息写入存储器，并且视频编码器可以被配置为读取统计信息和帧。 视频编码器可以被配置为响应于统计信息对帧进行编码。

    GLOBAL CONFIGURATION BROADCAST
    27.
    发明申请
    GLOBAL CONFIGURATION BROADCAST 有权
    全球配置广播

    公开(公告)号：US20150095630A1

    公开(公告)日：2015-04-02

    申请号：US14083010

    申请日：2013-11-18

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Joseph P. Bratt ,  Nitin Bhargava ,  Hao Chen ,  Joseph J. Cheng

    IPC: G06F9/44

    CPC classification number: G06F9/4401 ,  G06F3/0629 ,  G06F8/71 ,  G06F9/445

    Abstract: Methods and apparatus for configuring multiple components of a subsystem are described. The configuration memory of each of a plurality of components coupled to an interconnect includes a global configuration portion. The configuration memory of one of the components may be designated as a master global configuration for all of the components. A module coupled to the interconnect may receive writes to the components from a configuration source. For each write, the module may decode the write to determine addressing information and check to see if the write is addressed to the master global configuration. If the write is addressed to the master global configuration, the module broadcasts the write to the global configuration portion of each of the components via the interconnect. If the write is not addressed to the master global configuration, the module forwards the write to the appropriate component via the interconnect.

    Abstract translation: 描述用于配置子系统的多个组件的方法和装置。 耦合到互连的多个组件中的每一个的配置存储器包括全局配置部分。 可以将组件之一的配置存储器指定为用于所有组件的主全局配置。 耦合到互连的模块可以从配置源接收对组件的写入。 对于每次写入，模块可以解码写入以确定寻址信息，并检查写入是否寻址到主全局配置。 如果写入寻址到主全局配置，则模块通过互连广播写入每个组件的全局配置部分。 如果写入不适用于主全局配置，则模块通过互连将写入转发到相应的组件。

    IMAGE BLENDING MODES SYSTEMS AND METHODS
    29.
    发明公开
    IMAGE BLENDING MODES SYSTEMS AND METHODS 审中-公开

    公开(公告)号：US20240096010A1

    公开(公告)日：2024-03-21

    申请号：US17934138

    申请日：2022-09-21

    Applicant: Apple Inc.

    Inventor： Yun Gong ,  Jim C. Chou ,  Guy Cote

    IPC: G06T15/50

    CPC classification number: G06T15/503 ,  G06T3/0093

    Abstract: A device may include an electronic display to display an image frame based on blended image data and image processing circuitry to generate the blended image data by combining first image data and second image data via a blend operation. The blend operation may include receiving graphics alpha data indicative of a transparency factor to be applied to the first image data to generate a first layer of the blend operation. The blend operation may also include overlaying the first layer onto a second layer that is based on the second image data. Overlaying the first layer onto the second layer may include adding first pixels values of the first image data that include negative pixel values and are augmented by the transparency factor to second pixel values of the second image data to generate blended pixel values of the blended image data.

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