公开(公告)号：US20240305911A1

公开(公告)日：2024-09-12

申请号：US18120208

申请日：2023-03-10

Applicant: Apple Inc.

Inventor： Wayne Eric Burk ,  Oren Kerem ,  Hoi Man S. Ng ,  Michael Bekerman

IPC: H04N25/76 ,  H04N17/00 ,  H04N23/95 ,  H04N25/703

CPC classification number: H04N25/7795 ,  H04N17/002 ,  H04N23/95 ,  H04N25/703

Abstract: Embodiments relate to detecting a timeout error on receipt of valid pixel data from an image sensor by a sensor interface circuit. When the valid pixel data is not timely received at the sensor interface circuit, a timeout error signal is generated by the sensor interface circuit. A time limit for determining the timeout error signal may be defined by a global clock that provides a clock signal to the sensor interface circuit and other circuits. As a result, the sensor interface circuit generates a dummy frame and sends out the dummy frame to subsequent circuits so that the timeout error does not bottleneck subsequent processing stages. In contrast, if the valid pixel data is timely received, sensor data received from the image sensor is unpacked into a frame of pixels.

公开(公告)号：US11829237B1

公开(公告)日：2023-11-28

申请号：US17193730

申请日：2021-03-05

Applicant: Apple Inc.

Inventor： Marc A Schaub ,  Roy G. Moss ,  Michael Bekerman

IPC: G06F11/00 ,  H03M13/00 ,  G06F11/07 ,  G06F13/28

CPC classification number: G06F11/0793 ,  G06F13/28

Abstract: Systems, apparatuses, and methods for error detection and recovery when streaming data are described. A system includes one or more companion direct memory access (DMA) subsystems for transferring data. When an error is detected for a component of the companion DMA subsystem(s), the operations performed by the other components need to gracefully adapt to this error so that operations face only a minimal disruption. For example, while one or more consumers are still consuming a first frame, a companion router receives an indication of an error for a second frame, causing the companion router to send a router frame abort message to a route manager. In response, the route manager waits until the consumer(s) are consuming the second frame before sending them a frame abort message. The consumer(s) flush their pipeline and transition to an idle state waiting for a third frame after receiving the frame abort message.

公开(公告)号：US20230353339A1

公开(公告)日：2023-11-02

申请号：US18311129

申请日：2023-05-02

Applicant: Apple Inc.

Inventor： Christopher D. Finan ,  Alexander Ukanwa ,  Charles F. Dominguez ,  Jean-Didier Allegrucci ,  Jeffrey J. Irwin ,  Kalpana Bansal ,  Michael Bekerman ,  Remi Clavel

IPC: H04L7/00 ,  G06F1/12

CPC classification number: H04L7/0016 ,  H04L7/0008 ,  G06F1/12

Abstract: A method and apparatus for synchronizing a timebase is disclosed. A timebase management circuit includes limit circuitry, in a first clock domain, which generates, based on a global timebase, an initial timebase limit. The timebase management circuit includes, in a second clock domain, adjustment circuitry that generates an adjusted timebase limit based on the initial timebase limit. A storage circuit in the second clock domain stores a local timebase. Update circuitry, coupled to an output of the storage circuit, generates an updated local timebase using a clock signal in the second clock domain, wherein the updated local timebase is subject to the adjusted timebase limit.