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公开(公告)号：US10025143B2
公开(公告)日：2018-07-17
申请号：US15110230
申请日：2015-11-13
Inventor： Xiaofei Yang , Yuqing Yang , Yanxia Xin , Zailong Mo , Xue Jiang , Xun Mou
IPC: G02F1/1339 , G02F1/1343 , G02F1/1362 , G02F1/1333 , G02F1/1368
Abstract: An array substrate and a fabrication method thereof and a display device are provided. The array substrate comprises: a base substrate; a plurality of gate lines and a plurality of data lines formed on the base substrate, the plurality of gate lines and the plurality of data lines intersecting with each other to define a plurality of sub-pixels, each of the sub-pixels including a thin film transistor and a pixel electrode, and the plurality of sub-pixels including a first sub-pixel; a passivation layer formed on the base substrate and covering the gate lines, the data lines and the thin film transistor, a via hole being provided in the passivation layer and the pixel electrode being formed on the passivation layer and connected with a drain electrode or a source electrode of the thin film transistor through the via hole in each of the sub-pixels; and a first spacer, provided in the via hole of the first sub-pixel.
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公开(公告)号：US09323068B2
公开(公告)日：2016-04-26
申请号：US13940423
申请日：2013-07-12
Inventor： Yanxia Xin , Seungyik Park , Yuqing Yang
CPC classification number: G02B27/2235 , G02B27/148 , G02B27/2271 , G09G5/10 , H04N9/3129 , H04N13/39 , H04N13/398
Abstract: Embodiments of the invention relate to a spatial stereoscopic display device and an operating method thereof. The spatial stereoscopic display device comprises: a laser source; a two-dimensional scanning unit, receiving and projecting the laser light onto a variable isoclinic transflective unit; the variable isoclinic transflective unit, receiving and dividing the laser light into a first and second splitting lights intersecting in an imaging space, by transmission and reflection; a power source and position sensor unit, connected with the variable isoclinic transflective unit to control an intersection of the first and second splitting lights in the imaging space; the imaging space, provided with an up-conversion material inside, and the up-conversion material at the intersection of the first and second splitting lights is excited to form a light-emitting point; and the 3D modulator, connected with the laser source, the two-dimensional scanning unit, the power source and position sensor unit.
Abstract translation: 本发明的实施例涉及一种空间立体显示装置及其操作方法。 所述空间立体显示装置包括：激光源; 二维扫描单元，将激光接收并投影到可变的异视半透反射单元上; 可变异构透镜单元，通过透射和反射将激光接收并分割成与成像空间相交的第一和第二分裂光; 电源和位置传感器单元，与可变异构半透半反相单元连接，以控制成像空间中的第一和第二分光器的交点; 在第一和第二分光器的相交处设置有内转换材料的成像空间和上转换材料被激发以形成发光点; 以及与激光源连接的3D调制器，二维扫描单元，电源和位置传感器单元。
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公开(公告)号：US20150115272A1
公开(公告)日：2015-04-30
申请号：US14364489
申请日：2013-12-09
Inventor： Huiguang Yang , Yuqing Yang , Tianlei Shi , Seung Yik Park
IPC: H01L29/786 , H01L29/417 , H01L27/12
CPC classification number: H01L29/78675 , G02F1/134363 , G02F1/136227 , G02F2001/134372 , H01L27/1237 , H01L27/124 , H01L29/4175 , H01L29/78645
Abstract: Embodiments of the disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a thin film transistor formed on a base substrate, a plurality of strip pixel electrodes connected to a drain electrode of the thin film transistor, and a common electrode overlapping with and insulating from the plurality of strip pixel electrodes. The drain electrode has an extension portion, the extension portion extends in an arrangement direction of the plurality of strip pixel electrodes, and each of the strip pixel electrodes is connected to the extension portion.
Abstract translation: 本发明的实施例提供阵列基板及其制造方法以及显示装置。 阵列基板包括形成在基底基板上的薄膜晶体管，连接到薄膜晶体管的漏电极的多个条形像素电极以及与多个条形像素电极重叠并与之隔绝的公共电极。 漏电极具有延伸部分，延伸部分在多个带状像素电极的排列方向上延伸，并且每个带状像素电极连接到延伸部分。
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公开(公告)号：US12193310B2
公开(公告)日：2025-01-07
申请号：US17763801
申请日：2021-04-29
Inventor： Liudong Zhu , Yiyang Zhang , Qun Ma , Chenxing Wan , Jiahao Guo , Yuqing Yang
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate has an opening region, a display region, and an opening peripheral region between the opening region and the display region, and includes a base substrate, the opening peripheral region includes a first barrier dam and an insulating protection layer, the first barrier dam at least partially surrounds the opening region, the insulating protection layer includes at least one first material removal region, and a projection of the first material removal region on the base substrate is overlapped with a projection of the first barrier dam on the base substrate; in the at least one first material removal region, a material of the insulating protection layer is at least partially removed, to form a recess portion in the insulating protection layer or a through hole penetrating the insulating protection layer.
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公开(公告)号：US12035588B2
公开(公告)日：2024-07-09
申请号：US17437033
申请日：2021-01-20
Inventor： Gong Chen , Yuqing Yang , Yiyang Zhang , Zheng Bao , Zhiyong Yang , Yang Zhou , Huijun Li , Tingliang Liu , Huijuan Yang , Xin Zhang , Meng Zhang , Xiaofeng Jiang , Hao Zhang , Yu Wang
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: The present disclosure provides an array substrate, a method for manufacturing an array substrate and a display panel. The array substrate includes: a base having a display area, a peripheral area surrounding the display area, and a visible area located between the display area and the peripheral area; a plurality of voltage signal lines disposed on the base; a metal strip disposed on the base, the voltage signal lines are coupled to the metal strip, at least a portion of the metal strip is located in the visible area, and the portion of the metal strip located in the visible area is provided with an opening.
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Patent Agency Ranking
公开(公告)号：US12004376B2
公开(公告)日：2024-06-04
申请号：US17414332
申请日：2020-12-29
Inventor： Linhong Han , Yi Zhang , Guangzhou Zhao , Yiyang Zhang , Yuqing Yang , Tingliang Liu , Pengfei Yu , Yang Zhou , Qun Ma , Xiping Li , Shikai Qin , Weiyun Huang , Yue Long
IPC: H10K59/122 , H10K50/84 , H10K71/00 , H10K59/12
CPC classification number: H10K59/122 , H10K50/84 , H10K71/00 , H10K59/1201
Abstract: Provided are a display motherboard, a preparation method thereof, a display substrate and a display device. The display motherboard includes a plurality of display substrate regions and a cutting region located at a periphery of each of the plurality of display substrate regions; the display motherboard includes a driving structure layer arranged in each of the plurality of display substrate regions and a marking structure layer arranged in each cutting region, wherein the marking structure layer includes a cutting mark layer; and a planarization layer arranged on the driving structure layer and the marking structure layer, and covering the marking structure layer.
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公开(公告)号：US10600857B2
公开(公告)日：2020-03-24
申请号：US15566108
申请日：2017-05-27
Inventor： Qi Liu , Lei Zhang , Yuqing Yang , Kun Guo
Abstract: An organic light emitting display panel includes a display region and a non-display region, the display region provided with a gate wiring, a data wiring, an anode wiring and a cathode, wherein the cathode is disposed in a central region of the display region, the gate wiring, the data wiring, and the anode wiring are disposed along an edge region of the display region; the gate wiring has a first gate wiring parallel to a first direction, the data wiring has a first data wiring parallel to the first direction, the anode wiring has a first anode wiring parallel to the first direction, the first direction is a direction from the display region to the non-display region, a width of at least one of the first gate wiring, the first data wiring, and the first anode wiring, is gradually increased in the first direction.
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公开(公告)号：US10199295B2
公开(公告)日：2019-02-05
申请号：US15321172
申请日：2016-02-01
Inventor： Fan Yang , Kun Guo , Yuqing Yang , Qi Liu , Bo Zhang , Fei Chen , Tianyi Cheng , Zihua Li , Yan Wu , Jin Yang , Liman Peng , Chao Kong
IPC: H01L23/29 , H01L23/08 , G02F1/1339 , H01L23/053 , H01L23/13 , H01L23/15 , H01L23/24 , G02F1/1333 , G02F1/1345 , H01L51/52
Abstract: A display panel and a method for forming the same are disclosed. The display panel includes a first substrate and a second substrate arranged opposite to each other. An integrated circuit (IC) is arranged at a non-display region of the first substrate, and at least one supporting component is arranged beyond a portion of the non-display region where the IC is arranged. A thickness of the at least one supporting component is larger than a thickness of the IC.
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公开(公告)号：US10084028B2
公开(公告)日：2018-09-25
申请号：US15539986
申请日：2017-01-10
Inventor： Fan Yang , Kun Guo , Tianyi Cheng , Yi Zhang , Yuqing Yang , Liman Peng , Yan Wu , Wenbin Yang , Qi Liu , Weilin Lai , Liangliang Liu , Zhiyong Yang
IPC: H01L27/32
CPC classification number: H01L27/3246 , H01L27/3211 , H01L27/3248 , H01L27/326 , H01L51/0011 , H01L51/56
Abstract: A method for manufacturing a display substrate comprises: forming a pixel definition layer on a lower surface of a base so as to define a pixel area; forming a spacer on a lower surface of the pixel definition layer; arranging a mask plate under the spacer; and moving an evaporation source along a first direction parallel to the lower surface of the base, so as to form an organic light emitting layer in the pixel area. When the evaporation source starts forming the organic light emitting layer in the pixel area, the spacer and the mask plate do not block a first border of the evaporation area. Further, when the evaporation source stops forming the organic light emitting layer in the pixel area, the spacer and the mask plate do not block a second border of the evaporation area.
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公开(公告)号：US09905488B2
公开(公告)日：2018-02-27
申请号：US14908455
申请日：2015-09-11
Inventor： Haoyuan Fan , Yanxia Xin , Yuqing Yang
CPC classification number: H01L22/32 , H01L22/14 , H01L27/1244 , H01L27/1259
Abstract: The present disclosure provides an array substrate, its manufacturing method and a display device. The array substrate includes operating circuit interfaces, testing interfaces, and testing lines connecting the operating circuit interfaces and the testing interfaces. Each testing line includes at least one cut-off point, and conductive contacts extending to an upper surface of the array substrate are arranged at two sides of each cut-off point of the testing line. When testing an operating circuit, electrically connecting the conductive contacts at two sides of each cut-off point enables the testing line to be conductive.
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