公开(公告)号：US20170097708A1

公开(公告)日：2017-04-06

申请号：US14771618

申请日：2014-09-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Choi-Seung Jin ,  Jing Niu ,  Shuang Sun ,  Fangzhen Zhang

IPC: G06F3/041 ,  C03C17/23 ,  C03C15/00

CPC classification number: G06F3/0412 ,  C03C15/00 ,  C03C17/23 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04111

Abstract: The present invention has disclosed a touch screen, comprising: a substrate; at least one first electrode formed on the substrate; at least one second electrode formed on the substrate, the first electrode and the second electrode having different extending directions, and there being an intersecting area between a vertical projection of the first electrode on the substrate and a vertical projection of the second electrode on the substrate; and a first protection layer formed at least at the intersecting area between the first electrode and the second electrode; wherein, the substrate is provided with a groove at the intersecting area between the first electrode and the second electrode so as to at least receive therein a portion of the first electrode located within the intersecting area. The present invention has also disclosed a display device and a method for manufacturing the touch screen. The present invention is provided to prevent two electrodes in two different layers from electrically contacting with each other and to ensure the yield of the touch screen to some extent.

公开(公告)号：US20160141425A1

公开(公告)日：2016-05-19

申请号：US14777666

申请日：2015-02-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu ,  Zhijun Lv

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78675 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78633 ,  H01L29/78696

Abstract: The present disclosure discloses a thin film transistor assembly, an array substrate and a method of manufacturing the same, and a display device including the array substrate. The array substrate includes a substrate; a plurality of thin film transistors formed on the substrate; and a plurality of light shielding layers, each of the light shielding layers being arranged between a source electrode and a drain electrode of the thin film transistor and configured to block light from the exterior from illuminating an active layer of the thin film transistor. The light shielding layer and the source electrode and the drain electrode of the thin film transistor are formed in the same layer on the substrate. As the light shielding layer, the source electrode and the drain electrode of the thin film transistor and a data line may be formed on the substrate by using the same material layer through a single patterning process, times of performing patterning processes and the number of masks used may be reduced and thus manufacturing process and cost of the array substrate may be decreased.

Abstract translation: 本公开公开了一种薄膜晶体管组件，阵列基板及其制造方法，以及包括阵列基板的显示装置。 阵列基板包括基板; 形成在所述基板上的多个薄膜晶体管; 和多个遮光层，每个遮光层设置在薄膜晶体管的源电极和漏电极之间，并被构造成阻挡来自外部的光照射薄膜晶体管的有源层。 薄膜晶体管的遮光层和源电极以及漏极形成在基板上的同一层中。 作为遮光层，可以通过使用相同的材​​料层，通过单一的图案化工艺，进行图案化处理的次数和掩模的数量，在基板上形成薄膜晶体管的源电极和漏电极以及数据线 可以减少使用，因此阵列基板的制造工艺和成本可能降低。

公开(公告)号：US20150179668A1

公开(公告)日：2015-06-25

申请号：US14345875

申请日：2013-06-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jing Niu

IPC: H01L27/12 ,  H01L33/58

CPC classification number: H01L27/124 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2001/136222 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/4908 ,  H01L33/58

Abstract: A TFT array substrate, a method for fabricating the same and a display are disclosed. The TFT array substrate comprises: a plurality of gate lines, a plurality of data lines and a plurality of pixel regions defined by intersecting the plurality of gate lines and the plurality of data lines, a pixel electrode is disposed in each of the pixel regions. The TFT array substrate further comprises: a gate electrode formed on a substrate; a black matrix and an active layer sequentially formed above the gate electrode, the gate electrode and the active layer are isolated from each other via the black matrix overlaying the gate electrode; a source electrode and a drain electrode both formed on the active layer; a color filter layer formed on the source electrode, the drain electrode and the active layer; the pixel electrode is disposed on the color filter layer and connected to the drain electrode by way of a via hole penetrating through the color filter layer.

Abstract translation: 公开了TFT阵列基板，其制造方法和显示器。 TFT阵列基板包括：多条栅极线，多条数据线和与多条栅极线和多条数据线交叉而定义的多个像素区域，像素电极设置在每个像素区域中。 TFT阵列基板还包括：形成在基板上的栅电极; 依次形成在栅电极上方的黑矩阵和有源层，栅电极和有源层经由覆盖栅电极的黑矩阵相互隔离; 源电极和漏极两者都形成在有源层上; 形成在源电极，漏电极和有源层上的滤色器层; 像素电极设置在滤色器层上，并通过穿透滤色器层的通孔连接到漏电极。

公开(公告)号：US12167642B2

公开(公告)日：2024-12-10

申请号：US17769937

申请日：2021-05-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu ,  Yanan Niu ,  Jintao Peng ,  Lubin Shi

IPC: H01L27/14 ,  H01L27/12 ,  H10K59/121 ,  H10K59/131

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a pixel circuit, and the pixel circuit includes a light-emitting element, a driving circuit and a capacitor circuit. The driving circuit is configured to drive the light-emitting element to emit light; a first terminal of the capacitor circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the capacitor circuit is electrically connected to a data writing-in node; the capacitor circuit includes at least two capacitors connected in parallel with each other.

公开(公告)号：US20240274768A1

公开(公告)日：2024-08-15

申请号：US18023443

申请日：2022-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu

IPC: H01L33/62 ,  H01L25/075 ,  H01L33/54

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L33/54 ,  H01L2933/005 ,  H01L2933/0066

Abstract: A display substrate includes: a base substrate, a display functional layer located on a first side surface of the base substrate, where the display functional layer includes an encapsulation layer, and a plurality of metal lines located on a second side surface of the base substrate, a first gap being provided between adjacent metal lines. A first orthographic projection of the encapsulation layer onto the base substrate at least partially does not overlap a second orthographic projection of the first gap onto the base substrate, and/or, a light-shielding layer is arranged at a side of the encapsulation layer facing the metal lines, the light-shielding layer is located on the first side surface of the base substrate, and a third orthographic projection of the light-shielding layer onto the base substrate at least partially overlaps the second orthographic projection.

公开(公告)号：US20210134196A1

公开(公告)日：2021-05-06

申请号：US16639108

申请日：2019-03-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yanan Niu ,  Lei Chen ,  Zhongyuan Sun ,  Hongwei Tian ,  Wei Huang ,  Zhiqiang Jiao ,  Kuanjun Peng ,  Yichi Zhang ,  Jintao Peng ,  Jing Niu ,  Tingting Zhou

IPC: G09G3/00 ,  H01L27/32 ,  H01L51/00 ,  H01L51/52

Abstract: A flexible display panel includes a plurality of light-emitting regions separated from each other, a respective one of the plurality of light-emitting regions including a light emitting element and an encapsulating structure encapsulating the light emitting element; and a plurality of dummy regions connecting the plurality of light-emitting regions, a respective one of the plurality of light-emitting regions having a larger thickness than a respective dummy region and including a plurality of driving wires. The flexible display panel further includes a detecting wire in the plurality of dummy regions and the plurality of light emitting regions.

公开(公告)号：US10217851B2

公开(公告)日：2019-02-26

申请号：US15707827

申请日：2017-09-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jing Niu ,  Shuang Sun ,  Fangzhen Zhang ,  Dongcan Mi

IPC: H01L29/66 ,  H01L21/443 ,  H01L21/4763 ,  H01L29/786 ,  H01L27/12

Abstract: Embodiments of the disclosure provide an array substrate and a manufacturing method thereof, and a display device. The method includes: forming a semiconductor material film, a first insulation material film and a first conductive material film successively on a base substrate, and processing these films through a single patterning process to form an active pattern, a gate insulation pattern and a gate electrode; forming a second insulation layer and forming two contact holes in the second insulation layer and gate insulation pattern; forming a second conductive material film and forming two contact structures from portions of this layer; and forming a third conductive material film, and processing this layer through a single patterning process to form a pixel electrode, and source and drain electrodes being in direct contact with the two contact structures respectively, the pixel electrode and one contact structure being integrated into one piece.

公开(公告)号：US10050151B2

公开(公告)日：2018-08-14

申请号：US15276339

申请日：2016-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jing Niu ,  Xiaogai Chun

IPC: H01L27/14 ,  H01L21/00 ,  H01L21/84 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: A dual-gate TFT array substrate and manufacturing method thereof and a display device are provided. The manufacturing method includes: forming a common electrode and a top-gate electrode through one patterning process. The manufacturing method reduces the times of patterning process and simplifies the process flow.

公开(公告)号：US20180122924A1

公开(公告)日：2018-05-03

申请号：US15707827

申请日：2017-09-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jing Niu ,  Shuang Sun ,  Fangzhen Zhang ,  Dongcan Mi

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/443 ,  H01L21/4763

CPC classification number: H01L29/66969 ,  H01L21/443 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/78618 ,  H01L29/7869

Abstract: Embodiments of the disclosure provide an array substrate and a manufacturing method thereof, and a display device. The method includes: forming a semiconductor material film, a first insulation material film and a first conductive material film successively on a base substrate, and processing these films through a single patterning process to form an active pattern, a gate insulation pattern and a gate electrode; forming a second insulation layer and forming two contact holes in the second insulation layer and gate insulation pattern; forming a second conductive material film and forming two contact structures from portions of this layer; and forming a third conductive material film, and processing this layer through a single patterning process to form a pixel electrode, and source and drain electrodes being in direct contact with the two contact structures respectively, the pixel electrode and one contact structure being integrated into one piece.

公开(公告)号：US20170213916A1

公开(公告)日：2017-07-27

申请号：US15276339

申请日：2016-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jing Niu ,  Xiaogai Chun

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78648

Abstract: A dual-gate TFT array substrate and manufacturing method thereof and a display device are provided. The manufacturing method includes: forming a common electrode and a top-gate electrode through one patterning process. The manufacturing method reduces the times of patterning process and simplifies the process flow.