公开(公告)号：US07781776B2

公开(公告)日：2010-08-24

申请号：US12190887

申请日：2008-08-13

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

IPC: H01L21/30

CPC classification number: H01L27/1288 ,  H01L27/124

Abstract: An active device array substrate and its fabricating method are provided. According to the subject invention, the elements of an array substrate such as the thin film transistors, gate lines, gate pads, data lines, data pads and storage electrodes, are provided by forming a patterned first metal layer, an insulating layer, a patterned semiconductor layer and a patterned metal multilayer. Furthermore, the subject invention uses the means of selectively etching certain layers. Using the aforesaid means, the array substrate of the subject invention has some layers with under-cut structures, and thus, the number of the time-consuming and complicated mask etching process involved in the production of an array substrate can be reduced. The subject invention provides a relatively simple and time-saving method for producing an array substrate.

Abstract translation: 提供一种有源器件阵列衬底及其制造方法。 根据本发明，诸如薄膜晶体管，栅极线，栅极焊盘，数据线，数据焊盘和存储电极之类的阵列基板的元件通过形成图案化的第一金属层，绝缘层，图案化 半导体层和图案化金属多层。 此外，本发明使用选择性蚀刻某些层的方法。 使用上述方法，本发明的阵列基板具有一些具有欠切割结构的层，因此可以减少与制造阵列基板有关的耗时且复杂的掩模蚀刻工艺的数量。 本发明提供了用于制造阵列基板的相对简单且省时的方法。

公开(公告)号：US07751002B2

公开(公告)日：2010-07-06

申请号：US12190601

申请日：2008-08-13

Applicant: Shih-Chia Hsu ,  Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin

Inventor： Shih-Chia Hsu ,  Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin

IPC: G02F1/1335

CPC classification number: G02F1/133555 ,  G02F1/136213 ,  G02F1/136286

Abstract: A pixel structure of a transflective LCD panel includes a substrate, a data line and a scan, a thin film transistor containing an extending electrode, a first common electrode and a second common electrode, a transmissive pixel electrode, and a reflective pixel electrode forming a first coupling capacitor with the extending electrode and a second coupling capacitor with the second common electrode. The first and second common electrodes and the data line overlap with each other in an overlapping area, wherein the first common electrode is disposed between the second common electrode and the data line.

Abstract translation: 半透射型LCD面板的像素结构包括基板，数据线和扫描，包含延伸电极的薄膜晶体管，第一公共电极和第二公共电极，透射像素电极和反射像素电极，形成 第一耦合电容器与延伸电极和第二耦合电容器与第二公共电极。 第一和第二公共电极和数据线在重叠区域彼此重叠，其中第一公共电极设置在第二公共电极和数据线之间。

公开(公告)号：US20100053483A1

公开(公告)日：2010-03-04

申请号：US12419305

申请日：2009-04-07

Applicant: Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

Inventor： Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

IPC: G02F1/133 ,  G02F1/1337

CPC classification number: G02F1/1393 ,  G02F1/133753 ,  G02F1/134309 ,  G02F1/134363 ,  G02F2001/134381 ,  G02F2201/122

Abstract: A pixel structure includes at least a pixel electrode, and at least an aligning electrode. The pixel electrode, which has a central opening, is disposed on a substrate. The aligning electrode, which is disposed between the pixel electrode and substrate, includes an aligning part disposed under and corresponding to the central part of the pixel electrode. The aligning voltage applied to the aligning electrode is greater than the pixel voltage applied to the pixel electrode.

Abstract translation: 像素结构至少包括像素电极和至少一个对准电极。 具有中心开口的像素电极设置在基板上。 设置在像素电极和基板之间的对准电极包括设置在像素电极的中心部分下方并对应于其的中心部分的对准部。 施加到对准电极的取向电压大于施加到像素电极的像素电压。

公开(公告)号：US20090173943A1

公开(公告)日：2009-07-09

申请号：US12102027

申请日：2008-04-14

Applicant: Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

Inventor： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

IPC: H01L33/00

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

Abstract translation: 设置在基板上的有源矩阵阵列结构包括第一图案化导电层，图案化栅极绝缘层，图案化半导体层，第二图案化导电层，图案化外涂层和透明导电层。 图案化栅极绝缘层具有暴露第一图案化导电层的一部分的第一开口。 图案化的半导体层设置在图案化的栅极绝缘层上。 第二图案化导电层设置在图案化的半导体层上。 图案化的外涂层具有暴露第一图案化导电层的一部分和第二图案化导电层的一部分的第二开口。 透明导电层完全设置在基板上。 设置在第一开口和第二开口中的透明导电层在基板和图案化外涂层之间的位置处断开。

公开(公告)号：US20090108259A1

公开(公告)日：2009-04-30

申请号：US12040281

申请日：2008-02-29

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin

IPC: H01L27/12 ,  H01L21/84

CPC classification number: H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214 ,  H01L27/124

Abstract: A pixel structure of a fringe field switching liquid crystal display (FFS-LCD) and a method for manufacturing the pixel structure are provided. Compared to the conventional method of using seven photolithography-etching processes for manufacturing a pixel structure, the method of the present invention uses only six photolithography-etching processes that save manufacturing costs and time. Furthermore, the pixel structure thereby only comprises two insulating layers, and thus, the light transmittance thereof can be increased in comparison to the conventional pixel structure comprising three insulating layers.

Abstract translation: 提供了一种边缘场切换液晶显示器（FFS-LCD）的像素结构以及像素结构的制造方法。 与使用七个光刻蚀刻工艺用于制造像素结构的常规方法相比，本发明的方法仅使用六个光刻蚀刻工艺，其节省制造成本和时间。 此外，像素结构由此仅包括两个绝缘层，因此与包括三个绝缘层的常规像素结构相比，其透光率可以增加。

公开(公告)号：US20080237594A1

公开(公告)日：2008-10-02

申请号：US11863283

申请日：2007-09-28

Applicant: Hsiang-Lin Lin ,  Sung-Kao Liu

Inventor： Hsiang-Lin Lin ,  Sung-Kao Liu

IPC: H01L29/04 ,  H01L21/00

CPC classification number: G02F1/136227 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2001/136218

Abstract: A method of manufacturing a pixel structure is provided. A first patterned conductive layer including a gate and a data line is formed on a substrate. A gate insulating layer is formed to cover the first patterned conductive layer and a semiconductor channel layer is formed on the gate insulating layer above the gate. A second patterned conductive layer including a scan line, a common line, a source and a drain is formed on the gate insulating layer and the semiconductor channel layer. The scan line is connected to the gate and the common line is located above the data line. The source and drain are located on the semiconductor channel layer, and the source is connected to the data line. A passivation layer is formed on the substrate to cover the second patterned conductive layer. A pixel electrode connected to the drain is formed on the passivation layer.

Abstract translation: 提供了一种制造像素结构的方法。 在基板上形成包括栅极和数据线的第一图案化导电层。 形成栅极绝缘层以覆盖第一图案化导电层，并且在栅极上方的栅极绝缘层上形成半导体沟道层。 包括扫描线，公共线，源极和漏极的第二图案化导电层形成在栅极绝缘层和半导体沟道层上。 扫描线连接到栅极，公共线位于数据线上方。 源极和漏极位于半导体沟道层上，源极连接到数据线。 在衬底上形成钝化层以覆盖第二图案化导电层。 连接到漏极的像素电极形成在钝化层上。

公开(公告)号：US08339559B2

公开(公告)日：2012-12-25

申请号：US13466195

申请日：2012-05-08

Applicant: Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/136 ,  G02F1/1333 ,  G02F1/1343 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A liquid crystal display unit structure and the manufacturing method thereof are provided. The liquid crystal display unit structure comprises a patterned first metal layer with a first data line segment and a gate line on a substrate; a patterned dielectric layer covering the first data line and the gate line having a plurality of first openings and a second opening therein, a patterned etch stop layer having a first portion located above the first data line segment and a second portion; a patterned second metal layer including a common electrode line, a second data line segment, a source electrode and a drain electrode, wherein the first portion of the patterned etch stop layer is between the first data line segment and the common line; a patterned passivation layer and a patterned transparent conductive layer.

Abstract translation: 提供了一种液晶显示单元结构及其制造方法。 液晶显示单元结构包括在基板上具有第一数据线段和栅极线的图案化第一金属层; 覆盖第一数据线的图案化介电层和具有多个第一开口和第二开口的栅极线，具有位于第一数据线段上方的第一部分的图案化蚀刻停止层和第二部分; 图案化的第二金属层，包括公共电极线，第二数据线段，源电极和漏电极，其中图案化蚀刻停止层的第一部分在第一数据线段和公共线之间; 图案化钝化层和图案化的透明导电层。

公开(公告)号：US08304782B2

公开(公告)日：2012-11-06

申请号：US13439092

申请日：2012-04-04

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC: H01L29/04 ,  H01L31/036

CPC classification number: H01L27/124

Abstract: An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

Abstract translation: 提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US08294651B2

公开(公告)日：2012-10-23

申请号：US12508573

申请日：2009-07-24

Applicant: Ching-Huan Lin ,  Hsiang-Lin Lin ,  Shih-Chia Hsu ,  Sheng-Chao Liu ,  Kuang-Hsiang Liu

Inventor： Ching-Huan Lin ,  Hsiang-Lin Lin ,  Shih-Chia Hsu ,  Sheng-Chao Liu ,  Kuang-Hsiang Liu

IPC: G09G3/36

CPC classification number: G02F1/136286 ,  G09G3/3655 ,  G09G2300/0456 ,  G09G2320/0673

Abstract: A liquid crystal display (LCD) is provided. The LCD includes a display panel and a voltage supply device (VSD). The display panel includes a plurality of scan lines, a plurality of data lines disposed substantially perpendicularly with the scan lines, and a plurality of pixels. The pixels are respectively electrically connected with the corresponding data line and the corresponding scan line, and are arranged in an array. Each of the pixels includes a common line and a compensation line, wherein the common line is located in the transparent area to receive a common voltage, and the compensation line is located in the reflection area to receive a stable voltage. The VSD is coupled to the compensation line of each of the pixels for continuously and correspondingly providing the stable voltage to the compensation line of each of the pixels.

Abstract translation: 提供液晶显示器（LCD）。 LCD包括显示面板和电压供应装置（VSD）。 显示面板包括多条扫描线，与扫描线大致垂直设置的多条数据线以及多个像素。 像素分别与相应的数据线和对应的扫描线电连接，并且被排列成阵列。 每个像素包括公共线和补偿线，其中公共线位于透明区域中以接收公共电压，并且补偿线位于反射区域中以接收稳定的电压。 VSD耦合到每个像素的补偿线，用于连续地并相应地将稳定的电压提供给每个像素的补偿线。

公开(公告)号：US20110263053A1

公开(公告)日：2011-10-27

申请号：US13174795

申请日：2011-07-01

Applicant: Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

Inventor： Hsiang-Lin Lin ,  Ching-Yu Tsai ,  Yi-Sheng Cheng ,  Kuo-Yu Huang

IPC: H01L33/00

CPC classification number: H01L27/1288 ,  G09G3/3648 ,  G09G2300/0465 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/0657 ,  H01L29/41733 ,  H01L29/42384

Abstract: A pixel structure including a scan line, a data line, an active device, a shielding electrode, and a pixel electrode is provided on a substrate. The data line includes an upper conductive wire and a bottom conductive wire. The upper conductive wire is disposed over and across the scan line. The bottom conductive wire is electrically connected to the upper conductive wire. The active device is electrically connected to the scan line and the upper conductive wire. The shielding electrode is disposed over the bottom conductive wire. The pixel electrode disposed over the shielding electrode is electrically connected to the active device. In addition, parts of the pixel electrode and parts of the shielding electrode form a storage capacitor.

Abstract translation: 在基板上设置包括扫描线，数据线，有源器件，屏蔽电极和像素电极的像素结构。 数据线包括上导线和底导线。 上导线设置在扫描线上方并穿过扫描线。 底部导线与上导电线电连接。 有源器件电连接到扫描线和上导电线。 屏蔽电极设置在底部导线上。 设置在屏蔽电极上方的像素电极与有源器件电连接。 此外，像素电极的一部分和屏蔽电极的一部分形成存储电容器。