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公开(公告)号:US11430744B2
公开(公告)日:2022-08-30
申请号:US15673734
申请日:2017-08-10
Applicant: Cree, Inc.
Inventor: David Seebacher , Christian Schuberth , Peter Singerl , Alexander Komposch
IPC: H01L21/48 , H01L23/373 , H01L23/00 , H01L23/42 , H01L23/367
Abstract: In sonic examples, a method includes pre-stressing a flange, heating the flange to a die-attach temperature, and attaching a die to the flange at the die-attach temperature using a die-attach material. In some examples, the flange includes a metal material, the die-attach temperature may be at least two hundred degrees Celsius, and the die-attach material may include solder and/or an adhesive. In some examples, the method includes cooling the semiconductor die and metal flange to a room temperature after attaching the semiconductor die to the metal flange at the die-attach temperature using a die-attach material.
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公开(公告)号:US20220157671A1
公开(公告)日:2022-05-19
申请号:US17097294
申请日:2020-11-13
Applicant: Cree, Inc.
Inventor: Marvin Marbell , Melvin Nava , Jeremy Fisher , Alexander Komposch
IPC: H01L23/047 , H01L23/66 , H01L21/48
Abstract: A radio frequency (RF) transistor amplifier includes a package submount. a package frame comprising an electrically insulating member and one or more conductive layers on the package submount and exposing a surface thereof, a transistor die on the surface of the package submount and comprising respective terminals that are electrically connected to the package frame, a protective member covering the transistor die, and one or more electrical components that are attached to the package frame outside the protective member. Related RF power device packages and fabrication methods are also discussed.
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公开(公告)号:US11289378B2
公开(公告)日:2022-03-29
申请号:US16440063
申请日:2019-06-13
Applicant: Cree, Inc.
Inventor: Kevin Schneider , Alexander Komposch
IPC: H01L21/78 , H01L21/304 , H01L21/268 , H01L33/00 , H01L29/66
Abstract: A method for forming semiconductor devices from a semiconductor wafer includes cutting a first surface of a semiconductor wafer to form a first region that extends partially through the semiconductor wafer and the first region has a bottom portion. The method further includes directing a beam of laser light to the semiconductor wafer such that the beam of laser light is focused within the semiconductor wafer between the first surface and the second surface thereof and the beam of laser light further cuts the semiconductor wafer by material ablation to form a second region aligned with the first region. A resulting semiconductor device is disclosed as well.
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公开(公告)号:US20220084950A1
公开(公告)日:2022-03-17
申请号:US17018721
申请日:2020-09-11
Applicant: Cree, Inc.
Inventor: Basim Noori , Marvin Marbell , Scott Sheppard , Kwangmo Chris Lim , Alexander Komposch , Qianli Mu
IPC: H01L23/538 , H01L25/16 , H01L23/00 , H01L23/498 , H01L25/00 , H01L23/66
Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.
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公开(公告)号:US20210408979A1
公开(公告)日:2021-12-30
申请号:US16913783
申请日:2020-06-26
Applicant: Cree, Inc.
Inventor: Alexander Komposch , Qianli Mu , Kun Wang , Eng Wah Woo
Abstract: A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.
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公开(公告)号:US20210408976A1
公开(公告)日:2021-12-30
申请号:US16911757
申请日:2020-06-25
Applicant: Cree, Inc.
Inventor: Kwangmo Chris Lim , Basim Noori , Qianli Mu , Marvin Marbell , Scott Sheppard , Alexander Komposch
IPC: H03F3/19 , H03F1/02 , H03F1/56 , H01L23/047 , H01L23/367 , H01L23/66 , H01L23/00 , H01L25/16
Abstract: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.
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公开(公告)号:US20210210444A1
公开(公告)日:2021-07-08
申请号:US16737188
申请日:2020-01-08
Applicant: Cree, Inc.
Inventor: Simon Ward , Richard Wilson , Alexander Komposch
Abstract: RF amplifiers are provided that include a submount such as a thermally conductive flange. A dielectric substrate is mounted on an upper surface of the submount, the dielectric substrate having a first outer sidewall, a second outer sidewall that is opposite and substantially parallel to the first outer sidewall, and an interior opening. An RF amplifier die is mounted on the submount within the interior opening of the dielectric substrate, where a longitudinal axis of the RF amplifier die defines a first axis. The RF amplifier die is positioned so that a first angle defined by the intersection of the first axis with the first outer sidewall is between 5° and 45°. The dielectric substrate may be a ceramic substrate or a dielectric layer of a printed circuit board.
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公开(公告)号:US20200035660A1
公开(公告)日:2020-01-30
申请号:US16589624
申请日:2019-10-01
Applicant: Cree, Inc.
Inventor: Saurabh Goel , Alexander Komposch , Cynthia Blair , Cristian Gozzi
IPC: H01L25/00 , H01L23/36 , H01L23/538 , H01L23/66
Abstract: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a circuit board attached to the first main surface of the single metal flange. The circuit board includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The circuit board also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The circuit board also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.
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