-
公开(公告)号:US11837457B2
公开(公告)日:2023-12-05
申请号:US17018721
申请日:2020-09-11
Applicant: Cree, Inc.
Inventor: Basim Noori , Marvin Marbell , Scott Sheppard , Kwangmo Chris Lim , Alexander Komposch , Qianli Mu
IPC: H01L23/538 , H01L23/498 , H01L23/66 , H01L23/00 , H01L25/16 , H01L25/00 , H01L29/417 , H01L29/423
CPC classification number: H01L23/5389 , H01L23/49811 , H01L23/5386 , H01L23/66 , H01L24/16 , H01L24/32 , H01L25/16 , H01L25/50 , H01L29/41741 , H01L29/4238 , H01L2223/6644 , H01L2223/6655 , H01L2224/16227 , H01L2224/32245 , H01L2924/1033 , H01L2924/10253 , H01L2924/10272 , H01L2924/10344 , H01L2924/10346 , H01L2924/13064 , H01L2924/19105
Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.
-
公开(公告)号:US20210175351A1
公开(公告)日:2021-06-10
申请号:US17180048
申请日:2021-02-19
Applicant: Cree, Inc.
Inventor: Kyle Bothe , Evan Jones , Dan Namishia , Chris Hardiman , Fabian Radulescu , Terry Alcorn , Scott Sheppard , Bruce Schmukler
IPC: H01L29/778 , H01L21/306 , H03F1/02 , H01L29/40 , H03F3/21 , H01L21/285 , H01L29/45 , H01L29/417 , H01L29/20 , H01L29/66 , H01L21/765 , H01L29/205
Abstract: A power amplifier comprising a GaN-based high electron mobility transistor (HEMT) device, wherein a power added efficiency (PAE) of the power amplifier is greater than 32% at P1DB during operation of the power amplifier between 26.5 GHz and 30.5 GHz.
-
公开(公告)号:US10978583B2
公开(公告)日:2021-04-13
申请号:US16194760
申请日:2018-11-19
Applicant: Cree, Inc.
Inventor: Yueying Liu , Saptharishi Sriram , Scott Sheppard , Jennifer Gao
IPC: H01L29/76 , H01L29/201 , H01L29/10 , H01L29/47 , H01L29/778 , H01L29/423 , H01L29/417 , H03F3/193 , H03F3/21 , H01L27/085 , H01L29/06 , H03F3/42 , H03F3/195 , H03F1/32 , H01L29/20
Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
-
公开(公告)号:US20210104978A1
公开(公告)日:2021-04-08
申请号:US16590465
申请日:2019-10-02
Applicant: Cree, Inc.
Inventor: QIANLI MU , Zulhazmi Mokhti , Jia Guo , Scott Sheppard
IPC: H03F1/30 , H01L29/20 , H01L29/778 , H03F3/193
Abstract: Gallium nitride based RF transistor amplifiers include a semiconductor structure having a gallium nitride based channel layer and a gallium nitride based barrier layer thereon, and are configured to operate at a specific direct current drain-to-source bias voltage. These amplifiers are configured to have a normalized drain-to-gate capacitance at the direct current drain-to-source bias voltage, and to have a second normalized drain-to-gate capacitance at two-thirds the direct current drain-to-source bias voltage, where the second normalized drain-to-gate capacitance is less than twice the first normalized drain-to-gate capacitance.
-
5.
公开(公告)号:US20180374943A1
公开(公告)日:2018-12-27
申请号:US15628932
申请日:2017-06-21
Applicant: Cree, Inc.
Inventor: Yueying Liu , Saptharishi Sriram , Scott Sheppard
IPC: H01L29/778 , H01L29/06 , H01L29/423 , H01L29/20 , H01L27/095 , H01L21/8252 , H01L29/66 , H01L21/326 , H01L29/205
Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
-
公开(公告)号:US20140361341A1
公开(公告)日:2014-12-11
申请号:US13913490
申请日:2013-06-09
Applicant: CREE, INC.
Inventor: Saptharishi Sriram , Terry Alcorn , Fabian Radulescu , Scott Sheppard
IPC: H01L29/423 , H01L29/778
CPC classification number: H01L29/42356 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/778 , H01L29/7787
Abstract: A multi-stage transistor device is described. One embodiment of such a device is a dual-gate transistor, where the second stage gate is separated from a barrier layer by a thin spacer layer and is grounded through a connection to the source. In one embodiment the thin spacer layer and the second stage gate are placed in an aperture in a spacer layer. In another embodiment, the second stage gate is separated from a barrier layer by a spacer layer. The device can exhibit improved linearity and reduced complexity and cost.
Abstract translation: 描述多级晶体管器件。 这种器件的一个实施例是双栅晶体管,其中第二级栅极通过薄间隔层与阻挡层分离,并且通过与源极的连接而接地。 在一个实施例中,薄间隔层和第二级门被放置在间隔层中的孔中。 在另一个实施例中,第二级栅极通过间隔层与阻挡层分开。 该装置可以显示出改进的线性度并降低复杂性和成本。
-
公开(公告)号:US11355600B2
公开(公告)日:2022-06-07
申请号:US17148688
申请日:2021-01-14
Applicant: Cree, Inc.
Inventor: Kyoung-Keun Lee , Fabian Radulescu , Scott Sheppard
IPC: H01L29/40 , H01L21/02 , H01L21/306 , H01L29/20 , H01L29/205 , H01L29/66 , H01L29/778
Abstract: A high electron mobility transistor includes a channel layer, a barrier layer on the channel layer, source and drain contacts on the barrier layer, a gate contact between the source and drain contacts, and a multi-layer passivation structure on the upper surface of the barrier layer between the source contact and the drain contact. The multi-layer passivation structure includes a first passivation layer that comprises a charge dissipation material directly contacts the upper surface of the barrier layer and a second passivation layer comprising a different material than the first passivation layer that also directly contacts the upper surface of the barrier layer. In some embodiments, at least one recess may be formed in the upper surface of the barrier layer and the second passivation layer may be formed within the recesses.
-
公开(公告)号:US20220130965A1
公开(公告)日:2022-04-28
申请号:US17325666
申请日:2021-05-20
Applicant: Cree, Inc.
Inventor: Kyle Bothe , Jeremy Fisher , Matt King , Jia Guo , Qianli Mu , Scott Sheppard
IPC: H01L29/40 , H01L29/778 , H01L29/20 , H01L29/66
Abstract: A transistor device includes a semiconductor layer, source and drain contacts on the semiconductor layer, a gate contact on the semiconductor layer between the source and drain contacts, and a field plate over the semiconductor layer between the gate contact and the drain contact. The transistor device includes a first electrical connection between the field plate and the source contact that is outside an active region of the transistor device, and a second electrical connection between the field plate and the source contact.
-
公开(公告)号:US20210313293A1
公开(公告)日:2021-10-07
申请号:US17018762
申请日:2020-09-11
Applicant: Cree, Inc.
Inventor: Basim Noori , Marvin Marbell , Scott Sheppard , Kwangmo Chris Lim , Alexander Komposch , Qianli Mu
IPC: H01L23/00 , H03F3/195 , H01L23/047 , H01L23/31 , H01L23/66
Abstract: A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.
-
公开(公告)号:US20210313282A1
公开(公告)日:2021-10-07
申请号:US16906610
申请日:2020-06-19
Applicant: Cree, Inc.
Inventor: Basim Noori , Marvin Marbell , Scott Sheppard , Kwangmo Chris Lim , Alexander Komposch , Qianli Mu
Abstract: A transistor amplifier includes a group III-nitride based amplifier die including a gate terminal, a drain terminal, and a source terminal on a first surface of the amplifier die and an interconnect structure electrically bonded to the gate terminal, drain terminal and source terminal of the amplifier die on the first surface of the amplifier die and electrically bonded to an input path and output path of the transistor amplifier.
-
-
-
-
-
-
-
-
-