Multi-octave differential upconverter
    21.
    发明申请
    Multi-octave differential upconverter 有权
    多倍频程差分上变频器

    公开(公告)号:US20080096498A1

    公开(公告)日:2008-04-24

    申请号:US11584276

    申请日:2006-10-20

    IPC分类号: H04B1/04 H01Q11/12

    摘要: An apparatus in one example comprises a differential amplifier and a differential mixer. The differential amplifier is configured to receive a multi-octave differential input signal and output an amplified multi-octave differential output signal. The differential amplifier is also configured to substantially reduce second order harmonic distortion of the amplified multi-octave differential output signal through common mode rejection. The differential mixer configured to multiply the amplified multi-octave differential output signal with a local oscillator input signal and output an up-converted sub-octave differential output signal. The multi-octave differential input signal and the up-converted sub-octave differential output signal comprise a substantially same bandwidth.

    摘要翻译: 一个示例中的装置包括差分放大器和差分混频器。 差分放大器被配置为接收多倍频程差分输入信号并输出​​放大的多倍频程差分输出信号。 差分放大器还被配置为通过共模抑制来显着地减少放大的多倍频程差分输出信号的二次谐波失真。 差分混频器被配置为将放大的多倍频程差分输出信号与本地振荡器输入信号相乘,并输出上变频子倍频程差分输出信号。 多倍频程差分输入信号和上变频子倍频程差分输出信号包括基本相同的带宽。

    3D MMIC VCO and methods of making the same

    公开(公告)号:US07276981B2

    公开(公告)日:2007-10-02

    申请号:US11236033

    申请日:2005-09-27

    IPC分类号: H03B5/00

    CPC分类号: H03B5/1841

    摘要: A three dimensional (3D) microwave monolithic integrated circuit (MMIC) multi-push voltage controlled oscillator (VCO) and methods of making the same is provided. The 3D MMIC multi-push oscillator includes a plurality of matching frequency oscillators coupled to a phasing ring in substantially equidistantly spaced apart locations. A combined VCO output signal is provided at a central output connection point of the phasing ring. The central output connection point resides on a first plane. An output conductor transition has a first end coupled to the central output connection point and a second end provided as an output to the quad-push VCO. The output conductor transition extends transverse to the first plane and terminates at a second plane separated from the first plane. The multi-push oscillator can be a push-push, quad-push or N-push type VCO based on a particular implementation.

    Feedforward spur cancellation approach using low IP amplifier
    23.
    发明申请
    Feedforward spur cancellation approach using low IP amplifier 有权
    使用低IP放大器的前馈支线消除方法

    公开(公告)号:US20060160502A1

    公开(公告)日:2006-07-20

    申请号:US11038333

    申请日:2005-01-19

    申请人: Mark Kintis

    发明人: Mark Kintis

    IPC分类号: H01Q11/12

    CPC分类号: H03F1/3223

    摘要: A power amplifier circuit (40) that includes an error correction loop (44) having a lower IP3 error correction amplifier (54) than a main power amplifier (46) in a main signal path (48). A first attenuator (52) in the error loop (44) attenuates the RF signal, and provides more attenuation of intermodulation products in the RF signal and about the same attenuation for a main frequency of the RF signal for each dB of attenuation. The error amplifier (54) amplifies the attenuated RF signal from the first attenuator (52). A second attenuator (56) in the error loop (44) attenuates the RF signal from the error correction amplifier (54). A phase shifter (58) phase shifts the RF signal from the second attenuator (56). A coupler (50) couples the amplified RF signal and the phase shifted RF signal to cancel out intermodulation products in the amplified RF signal.

    摘要翻译: 一种功率放大器电路(40),其包括具有比主信号路径(48)中的主功率放大器(46)更低的IP3误差校正放大器(54)的纠错环路(44)。 误差环路(44)中的第一衰减器(52)衰减RF信号,并且在RF信号中提供更多的互调产物的衰减,并且对于每dB衰减量,对于RF信号的主频率大约相同的衰减。 误差放大器(54)放大来自第一衰减器(52)的衰减的RF信号。 错误环路(44)中的第二衰减器(56)衰减来自纠错放大器(54)的RF信号。 移相器(58)使来自第二衰减器(56)的RF信号相移。 耦合器(50)耦合放大的RF信号和相移的RF信号,以消除放大的RF信号中的互调产物。

    Architecture for multi-carrier receiver
    24.
    发明授权
    Architecture for multi-carrier receiver 有权
    多载波接收机的架构

    公开(公告)号:US06798848B1

    公开(公告)日:2004-09-28

    申请号:US09605947

    申请日:2000-06-28

    IPC分类号: H03K900

    摘要: A receiver (10) for a wireless telecommunications system that provides relatively wideband signal processing of received signals without increased signal distortion so that multiple received signals can be simultaneously processed. The receiver (10) includes a specialized LNA (16), frequency down-converter (18) and ADC (20) to perform the wideband signal processing while maintaining receiver performance. The frequency down-converter (18) employs a suitable mixer (28), BPA (32), attenuator (34), and transformer (36) that are tuned to provide the desired frequency down-conversion and amplitude control over the desired wideband. The down-converter devices are selected depending on the particular performance criteria of the ADC (20). A specialized digital channelizer (22) is included in the receiver (10) that receives the digital signal from the ADC (20), and separates the signals into the multiple channels. In one embodiment, the frequency down-conversion is performed in a single down-conversion process, and the ADC (20) employs delta-sigma processing to provide digital conversion over the complete frequency band. In an alternate embodiment, the frequency down-conversion is performed in a double down-conversion process so that a less complex ADC (62) can be used.

    摘要翻译: 一种用于无线电信系统的接收机(10),其提供接收信号的相对宽带信号处理,而不增加信号失真,使得可以同时处理多个接收信号。 接收器(10)包括专用LNA(16),降频转换器(18)和ADC(20),以在维持接收机性能的同时执行宽带信号处理。 降频转换器(18)采用合适的混频器(28),BPA(32),衰减器(34)和变压器(36),其被调谐以在期望的宽带上提供期望的频率下变频和幅度控制。 根据ADC的特定性能标准(20)选择下转换器器件。 在接收器(10)中包括一个专门的数字信道化器(22),其接收来自ADC(20)的数字信号,并将信号分离成多个信道。 在一个实施例中,在单个下变频处理中执行降频转换,并且ADC(20)采用delta-sigma处理来在整个频带上提供数字转换。 在替代实施例中,在双下变频过程中执行降频转换,使得可以使用较不复杂的ADC(62)。

    Fast settling fine stepping phase locked loops
    26.
    发明授权
    Fast settling fine stepping phase locked loops 有权
    快速稳定精细步进锁相环

    公开(公告)号:US06766154B2

    公开(公告)日:2004-07-20

    申请号:US09800699

    申请日:2001-03-07

    IPC分类号: H04B700

    摘要: Fast switching and fast settling is achieved in a phase locked loop (“PLL”) containing a bandwidth switched active loop filter (8) by feeding the phase error signal of the phase detector (1) of the PLL to the non-inverting input of the amplifier (7) within the loop filter and having the electronic switch (17) control the loop filter bandwidth through changing the resistance (9, 11) to ground at the inverting input of the amplifier between a high and low value associated respectively with broad bandwidth and narrow bandwidth to the loop filter. Switching is possible in as little as one microsecond, and is accompanied by fast settling of the loop with minimal generation of phase/frequency perturbation. The foregoing PLL is of particular benefit in fast switching frequency synthesizers, such as used in frequency hopping frequency synthesizers of frequency and time division multiplexing systems.

    摘要翻译: 通过将PLL的相位检测器(1)的相位误差信号馈送到相位检测器(1)的非反相输入端,在包含带宽切换有源环路滤波器(8)的锁相环(“PLL”)中实现快速切换和快速建立 环路滤波器内的放大器(7)并且具有电子开关(17),通过将放大器的反相输入端的电阻(9,11)改变为接地,控制环路滤波器带宽,分别与分别与宽 带宽和窄带宽到环路滤波器。 可以在短达1微秒的时间内进行切换,同时伴随着循环的快速建立,同时产生相位/频率扰动的最小化。 上述PLL在诸如频率和时分复用系统的跳频频率合成器中使用的快速开关频率合成器中特别有益。

    Nonlinear transmission line waveform generator having an input voltage matched to the C/V characteristic of the transmission line
    27.
    发明授权
    Nonlinear transmission line waveform generator having an input voltage matched to the C/V characteristic of the transmission line 有权
    具有与传输线的C / V特性匹配的输入电压的非线性传输线波形发生器

    公开(公告)号:US06690247B2

    公开(公告)日:2004-02-10

    申请号:US09245609

    申请日:1999-02-05

    IPC分类号: H03K336

    CPC分类号: H03K5/12 H03K5/156

    摘要: A nonlinear transmission-line waveform generator for generating a comb of frequencies and relatively short duration pulses, for example, in the range of picoseconds and tens of picoseconds, that are adapted to being utilized with ultra wideband radios in order to improve the bandwidth of such radios by an order of magnitude, for example, up to tens and even hundreds of GHz. In particular, the nonlinear transmission line waveform generator in accordance with the present invention consists of a microstrip or coplanar waveguide line. In accordance with an important aspect of the invention, the &Dgr;C/&Dgr;V characteristic of the nonlinear transmission line is matched to the frequency and amplitude of the input sinusoidal waveform. By matching the &Dgr;C/&Dgr;V characteristics of the nonlinear transmission line to the input sinusoidal waveform, the output of the nonlinear transmission line produces a comb of frequencies that are multiples of the input sinusoidal waveform frequency, making it suitable as a harmonic generator. The nonlinear transmission line can also be used to generate relatively short duration pulses by disposing a shorting stub at the output. The shorting stub causes the waveform to be reflected 180° out of phase so that it cancels the trailing edge of the original output from the nonlinear transmission lines to form a short duration pulse in the picosecond range. The length of the stub determines the width of the resultant output pulse.

    摘要翻译: 一种非线性传输线波形发生器,用于产生适于与超宽带无线电一起使用的频率梳和相对较短持续时间的脉冲,例如在皮秒和几十皮秒的范围内,以便改善这样的带宽 无线电台的数量级,例如达数十甚至数百GHz。 特别地,根据本发明的非线性传输线波形发生器由微带或共面波导线组成。 根据本发明的重要方面,非线性传输线的DeltaC / DeltaV特性与输入正弦波形的频率和幅度相匹配。 通过将非线性传输线的DeltaC / DeltaV特性与输入正弦波形匹配,非线性传输线的输出产生的频率梳是输入正弦波形频率的倍数,使其适合作为谐波发生器。 非线性传输线还可用于通过在输出端设置短路短截线来产生相对短的持续时间脉冲。 短路短线使得波形相位反射180°,从而抵消来自非线性传输线的原始输出的后沿,以在皮秒范围内形成短持续时间脉冲。 短截线的长度确定所得输出脉冲的宽度。

    Multi-carrier receiver for a wireless telecommunication system
    28.
    发明授权
    Multi-carrier receiver for a wireless telecommunication system 有权
    用于无线电信系统的多载波接收机

    公开(公告)号:US06631255B1

    公开(公告)日:2003-10-07

    申请号:US09605481

    申请日:2000-06-28

    IPC分类号: H04B118

    摘要: A receiver (10) for a wireless telecommunications system that provides relatively wideband signal processing of received signals without increased signal distortion so that multiple received signals can be simultaneously processed. The receiver (10) includes a specialized LNA (16), frequency down-converter (18) and ADC (20) to perform the wideband signal processing while maintaining receiver performance. The frequency down-converter (18) employs a suitable mixer (28), BPA (32), attenuator (34), and transformer (36) that are tuned to provide the desired frequency down-conversion and amplitude control over the desired wideband. The down-converter devices are selected depending on the particular performance criteria of the ADC (20). A specialized digital channelizer (22) is included in the receiver (10) that receives the digital signal from the ADC (20), and separates the signals into the multiple channels. In one embodiment, the frequency down-conversion is performed in a single down-conversion process, and the ADC (20) employs delta-sigma processing to provide digital conversion over the complete frequency band. In an alternate embodiment, the frequency down-conversion is performed in a double down-conversion process so that a less complex ADC (62) can be used.

    摘要翻译: 一种用于无线电信系统的接收机(10),其提供接收信号的相对宽带信号处理,而不增加信号失真,使得可以同时处理多个接收信号。 接收器(10)包括专用LNA(16),降频转换器(18)和ADC(20),以在维持接收机性能的同时执行宽带信号处理。 降频转换器(18)采用合适的混频器(28),BPA(32),衰减器(34)和变压器(36),其被调谐以在期望的宽带上提供期望的频率下变频和幅度控制。 根据ADC的特定性能标准(20)选择下转换器器件。 在接收器(10)中包括一个专门的数字信道化器(22),其接收来自ADC(20)的数字信号,并将信号分离成多个信道。 在一个实施例中,在单个下变频处理中执行降频转换,并且ADC(20)采用delta-sigma处理来在整个频带上提供数字转换。 在替代实施例中,在双下变频过程中执行降频转换,使得可以使用较不复杂的ADC(62)。

    Variable delay line detector
    29.
    发明授权
    Variable delay line detector 有权
    可变延迟线检测器

    公开(公告)号:US06396338B1

    公开(公告)日:2002-05-28

    申请号:US09427453

    申请日:1999-10-26

    IPC分类号: H03D300

    CPC分类号: H03D3/06

    摘要: A variable delay line detector (34, 48, 66)includes a power splitter (36, 50, 68), a mixer (44, 62, 72) and a variable delay line (42,52, 70). Various devices are suitable for the variable delay line (42, 52, 70), such as a non-linear transmission line (NLTL). By providing a variable delay line, the variable delay line detector (34, 48, 66) is adapted to be programmed in real time thus making it suitable in applications where the phase and or frequency of the input signal varies. As such, the variable delay line detector (34, 48, 66) may be used in applications heretofore unknown, such &a an inexpensive demodulator in a frequency hopped spread spectrum system.

    摘要翻译: 可变延迟线检测器(34,48,66)包括功率分配器(36,50,68),混合器(44,62,72)和可变延迟线(42,52,70)。 各种装置适用于诸如非线性传输线(NLTL)的可变延迟线(42,52,70)。 通过提供可变延迟线,可变延迟线检测器(34,48,66)适于实时编程,从而使其适用于输入信号的相位和/或频率变化的应用。 因此,可变延迟线检测器(34,48,66)可以用于迄今为止未知的应用中,例如在频率跳频扩频系统中是便宜的解调器。

    Frequency modulation-based folding optical analog-to-digital converter
    30.
    发明授权
    Frequency modulation-based folding optical analog-to-digital converter 失效
    基于频率调制的折叠光学模数转换器

    公开(公告)号:US6064325A

    公开(公告)日:2000-05-16

    申请号:US133037

    申请日:1998-08-11

    IPC分类号: G02F7/00 H03M1/00

    CPC分类号: G02F7/00

    摘要: A frequency modulation-based optical analog-to-digital converter utilizes a downward-folding, successive approximation approach. A series of stages is utilized to generate bits in the digital signal. In each stage, complementary low and high bandpass filters collectively cover a bandpass frequency range from a low frequency to a high frequency. The high frequency filtered signal from the high bandpass filter is observed to obtain a bit in the digital word. By performing the folding operations in the frequency domain, the converter avoids the difficult task of optical power subtraction, relying instead on frequency down-conversions. The high frequency filtered signal passed by the high bandpass filter is then downconverted and added to the low pass filter signal to generate a modulated signal for the next stage.

    摘要翻译: 基于频率调制的光学模数转换器利用向下折叠的逐次近似方法。 利用一系列级来产生数字信号中的位。 在每个阶段,互补的低和高带通滤波器共同覆盖从低频到高频的带通频率范围。 观察到来自高带通滤波器的高频滤波信号以获得数字字中的位。 通过在频域执行折叠操作,转换器避免了光功率减法的困难任务,而是依靠降频转换。 然后,由高带通滤波器通过的高频滤波信号被下变频并加到低通滤波器信号中,以生成下一级的调制信号。