公开(公告)号：US08305120B2

公开(公告)日：2012-11-06

申请号：US13476393

申请日：2012-05-21

Applicant: Feng Lin

Inventor： Feng Lin

IPC: H03L7/06

CPC classification number: H03L7/0812

Abstract: Delay locked loop circuits and methods are disclosed. In the embodiments, a delay locked loop may include a phase detector to detect a phase difference between a clock signal and a reference clock signal, and a charge pump that receives the detected phase difference. A low pass filter may filter an output from the charge pump. The delay locked loop may further include a delay line having a plurality of delay elements, the plurality of delay elements including a first selectable group and a second selectable group that is larger than the first selectable group. A first clock signal from the first group of delay elements may be provided to the phase detector to first synchronize the delay locked loop, and following the synchronization, a second clock signal from the second group may be employed to synchronize the delay locked loop.

公开(公告)号：US08278993B2

公开(公告)日：2012-10-02

申请号：US13025777

申请日：2011-02-11

Applicant: Feng Lin

Inventor： Feng Lin

IPC: G05F1/10

CPC classification number: G06F1/10 ,  H03K3/35613

Abstract: Some embodiments include apparatus and methods having a clock path with a combination of current-mode logic (CML) based and complementary metal-oxide semiconductor (CMOS) components.

Abstract translation: 一些实施例包括具有基于电流模式逻辑（CML）和互补金属氧化物半导体（CMOS）组件的组合的时钟路径的装置和方法。

公开(公告)号：US20120150040A1

公开(公告)日：2012-06-14

申请号：US13399361

申请日：2012-02-17

Applicant: Feng Lin ,  Christopher Robert Hazard ,  Mirsaid Seyed-Bolorforosh ,  Karsten Hiltawsky ,  Zhe Wu

Inventor： Feng Lin ,  Christopher Robert Hazard ,  Mirsaid Seyed-Bolorforosh ,  Karsten Hiltawsky ,  Zhe Wu

IPC: A61B8/13

CPC classification number: A61B8/485 ,  A61B8/08 ,  A61B8/0858 ,  G01N29/041 ,  G01N29/043 ,  G01S7/52085

Abstract: An apparatus, system and method for adaptively controlling a frame interval between ultrasound scanning frames of an ultrasound elasticity imaging scan. The system includes a transmitter for transmitting ultrasound beams to a subject during an ultrasound elasticity imaging scan, and a receiver for receiving ultrasound beam echoes from the subject responsive to transmitted ultrasound beams. The system also includes a processor for processing a plurality of the ultrasound beam echoes to determine a strain variation of the tissue undergoing strain, calculating a value for an ultrasound scanning frame interval adapted for imaging the tissue undergoing the determined strain variation, and setting the value of the ultrasound scanning frame interval for acquiring ultrasound elasticity images of the tissue undergoing the determined strain variation.

Abstract translation: 一种用于自适应地控制超声波弹性成像扫描的超声扫描帧之间的帧间隔的装置，系统和方法。 该系统包括用于在超声波弹性成像扫描期间将超声波束发送到被摄体的发射器，以及用于响应于所发送的超声波束从受检者接收超声波束回波的接收器。 该系统还包括处理器，用于处理多个超声波束回波以确定经历应变的组织的应变变化，计算适于对经历所确定的应变变化的组织进行成像的超声扫描帧间隔的值，以及设定值 的超声扫描帧间隔，用于获取经历所确定的应变变化的组织的超声弹性图像。

公开(公告)号：US08183787B2

公开(公告)日：2012-05-22

申请号：US12718210

申请日：2010-03-05

Applicant: Zhimou Ren ,  Jun Ren ,  Yunning Xie ,  Tiesheng Yan ,  Feng Lin

Inventor： Zhimou Ren ,  Jun Ren ,  Yunning Xie ,  Tiesheng Yan ,  Feng Lin

IPC: H05B41/36 ,  H05B41/14

CPC classification number: H05B33/0884 ,  H05B33/0815 ,  H05B33/0851 ,  Y02B20/346

Abstract: A power supply system includes a power converter, a switch, and a controller. The power converter is operable for providing power to a load. The switch is coupled to the power converter and is operable for adjusting the power to the load. The switch has a gate, a source and a drain. The controller is coupled to the switch and is operable for controlling a state of the switch. The controller has a first control terminal for providing a gate voltage to the gate of the switch, a second control terminal for providing a source voltage to the source of the switch, and an input terminal for receiving a supply voltage via the source of the switch. The controller is also operable for limiting the supply voltage within a predetermined maximum level by regulating the gate voltage to a preset level.

Abstract translation: 电源系统包括功率转换器，开关和控制器。 功率转换器可操作以向负载提供电力。 开关耦合到功率转换器，并且可操作用于调节负载的功率。 开关有一个门，一个源和一个漏极。 控制器耦合到开关并且可操作用于控制开关的状态。 控制器具有用于向开关的栅极提供栅极电压的第一控制端子，用于向开关源提供源极电压的第二控制端子以及用于经由开关源接收电源电压的输入端子 。 控制器还可操作用于通过将栅极电压调节到预设电平来将电源电压限制在预定最大电平内。

公开(公告)号：US08123692B2

公开(公告)日：2012-02-28

申请号：US11567285

申请日：2006-12-06

Applicant: Feng Lin ,  Christopher Robert Hazard ,  Mirsaid Seyed-Bolorforosh ,  Karsten Hiltawsky ,  Zhe Wu

Inventor： Feng Lin ,  Christopher Robert Hazard ,  Mirsaid Seyed-Bolorforosh ,  Karsten Hiltawsky ,  Zhe Wu

IPC: A61B8/00

CPC classification number: A61B8/485 ,  A61B8/08 ,  A61B8/0858 ,  G01N29/041 ,  G01N29/043 ,  G01S7/52085

Abstract: An apparatus, system and method for adaptively controlling a frame interval between ultrasound scanning frames of an ultrasound elasticity imaging scan. The system includes a transmitter for transmitting ultrasound beams to a subject during an ultrasound elasticity imaging scan, and a receiver for receiving ultrasound beam echoes from the subject responsive to transmitted ultrasound beams. The system also includes a processor for processing a plurality of the ultrasound beam echoes to determine a strain variation of the tissue undergoing strain, calculating a value for an ultrasound scanning frame interval adapted for imaging the tissue undergoing the determined strain variation, and setting the value of the ultrasound scanning frame interval for acquiring ultrasound elasticity images of the tissue undergoing the determined strain variation.

Abstract translation: 一种用于自适应地控制超声波弹性成像扫描的超声扫描帧之间的帧间隔的装置，系统和方法。 该系统包括用于在超声波弹性成像扫描期间将超声波束发送到被摄体的发射器，以及用于响应于所发送的超声波束从受检者接收超声波束回波的接收器。 该系统还包括处理器，用于处理多个超声波束回波以确定经历应变的组织的应变变化，计算适于对经历所确定的应变变化的组织进行成像的超声扫描帧间隔的值，以及设定值 的超声扫描帧间隔，用于获取经历所确定的应变变化的组织的超声弹性图像。

公开(公告)号：US20110279159A1

公开(公告)日：2011-11-17

申请号：US13194777

申请日：2011-07-29

Applicant: Feng Lin

Inventor： Feng Lin

IPC: H03K3/017

CPC classification number: H03K5/1565 ,  H03K5/133 ,  H03K2005/00065 ,  H03K2005/00071 ,  H03L7/0814

Abstract: Duty-cycle correction circuits, clock distribution networks, and methods for correcting duty-cycle distortion are disclosed, including methods and apparatus for correcting duty-cycle distortion of differential output clock signals provided from a clock distribution network. In one such method, a single-ended clock signal is generated from differential input clock signals for distribution over a clock distribution network and from which the differential output clock signals are generated. A delay of a model delay path is matched to a propagation delay of the clock distribution network, and the single ended clock signal is adjusted to compensate for duty-cycle distortion.

Abstract translation: 公开了用于校正占空比失真的占空比校正电路，时钟分配网络和方法，包括用于校正从时钟分配网络提供的差分输出时钟信号的占空比失真的方法和装置。 在一种这样的方法中，从差分输入时钟信号产生单端时钟信号，以便在时钟分配网络上进行分配，从而生成差分输出时钟信号。 模型延迟路径的延迟与时钟分配网络的传播延迟相匹配，并且调整单端时钟信号以补偿占空比失真。

公开(公告)号：US08001410B2

公开(公告)日：2011-08-16

申请号：US12264354

申请日：2008-11-04

Applicant: Feng Lin

Inventor： Feng Lin

IPC: G06F1/00 ,  G06F1/12 ,  G06F12/00 ,  H03K3/84 ,  H03K5/01 ,  H03K21/00 ,  H03L7/00 ,  H03B21/00 ,  H03B5/20 ,  H03B5/08 ,  G11C8/00 ,  H04L7/00

CPC classification number: G11C29/02 ,  G06F1/04 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4076 ,  G11C29/023 ,  H03L7/0814

Abstract: There is provided a system for comparing the phase characteristics of three generated clock signals, each having a unique phase relationship with an original clock signal, with the original clock signal and to select a signal based on the proximity of the phase characteristic of the three signals to the original signal. The selection of a clock signal that most closely approximates the original significantly reduces lock time when attempting to synchronize an internal clock with an external clock. Additionally, there is provided a method for comparing three clock signals with an original clock signal and selecting from the three clock signals one that is approximately in phase with the original clock signal.

Abstract translation: 提供了一种用于将三个生成的时钟信号的相位特性与原始时钟信号进行比较的系统，每个时钟信号与原始时钟信号具有唯一的相位关系，并且基于三个信号的相位特性的接近来选择信号 到原来的信号。 当尝试将内部时钟与外部时钟同步时，选择最接近原来的时钟信号可显着减少锁定时间。 此外，提供了一种用于将三个时钟信号与原始时钟信号进行比较的方法，并且从三个时钟信号中选择与原始时钟信号大致同相的一个。

公开(公告)号：US07969595B2

公开(公告)日：2011-06-28

申请号：US10587890

申请日：2004-09-20

Applicant: Feng Lin ,  Ling Su

Inventor： Feng Lin ,  Ling Su

IPC: G06F3/12 ,  G06K15/00

CPC classification number: G06F3/1286 ,  G06F3/1204 ,  G06F3/126 ,  G06F3/1288 ,  H04N1/00222 ,  H04N1/00233 ,  H04N1/00244 ,  H04N1/0035 ,  H04N1/00384 ,  H04N2201/0075

Abstract: A network printer for users printing documents in the Internet contains a keypad, when a user on the keypad enters a number, the printer sends the number to a first server; the first Internet server translates the number into the URL of a document in a second server in the Internet, and sends the URL to the printer; according to the URL, the printer retrieves the document from the second server via Internet, and prints the document.

Abstract translation: 用于在因特网上打印文档的用户的网络打印机包含小键盘，当键盘上的用户输入数字时，打印机将号码发送到第一服务器; 第一个互联网服务器将该号码转换成Internet中的第二个服务器中的文档的URL，并将该URL发送到打印机; 根据URL，打印机通过互联网从第二台服务器检索文档，并打印文档。

公开(公告)号：US07961019B2

公开(公告)日：2011-06-14

申请号：US12605203

申请日：2009-10-23

Applicant: Feng Lin

Inventor： Feng Lin

IPC: H03L7/06

CPC classification number: G11C29/02 ,  G11C7/20 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4072 ,  G11C11/4076 ,  G11C29/023 ,  G11C29/028 ,  G11C29/50012 ,  G11C2029/0409

Abstract: A delay-lock loop receives an input clock signal from the output of a programmable divider that receives a reference clock signal. The delay-lock loop includes a voltage-controlled delay line generating a plurality of delayed clock signals having different phases. A plurality of the delayed clock signals are combined to generate a plurality of output signals. During an initialization period, an initialization circuit sets the delay of the delay line to a minimum delay value and then compares this delay value to the period of the input clock signal. Based on this comparison, the initialization circuit programs the programmable divider and adjusts the number of delayed clock signals combined to generate the output signals. More specifically, as the frequency of the reference clock signal increases, the divider is programmed to divide by a greater number, and a larger number of delay clock signals are combined to generate the output signals.

公开(公告)号：US20110050307A1

公开(公告)日：2011-03-03

申请号：US12553792

申请日：2009-09-03

Applicant: Feng Lin

Inventor： Feng Lin

IPC: H03K3/017

CPC classification number: H03K5/1565 ,  H03K5/133 ,  H03K2005/00065 ,  H03K2005/00071 ,  H03L7/0814

Abstract: Duty-cycle correction circuits, clock distribution networks, and methods for correcting duty-cycle distortion are disclosed, including methods and apparatus for correcting duty-cycle distortion of differential output clock signals provided from a clock distribution network. In one such method, a single-ended clock signal is generated from differential input clock signals for distribution over a clock distribution network and from which the differential output clock signals are generated. A delay of a model delay path is matched to a propagation delay of the clock distribution network, and the single ended clock signal is adjusted to compensate for duty-cycle distortion.