METHODS OF FORMING CAP LAYERS FOR SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICES
    21.
    发明申请
    METHODS OF FORMING CAP LAYERS FOR SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICES 有权
    形成具有自对准接触元件和结果器件的半导体器件的封装层的方法

    公开(公告)号:US20150035086A1

    公开(公告)日:2015-02-05

    申请号:US13957991

    申请日:2013-08-02

    Abstract: One method disclosed herein includes forming an etch stop layer above recessed sidewall spacers and a recessed replacement gate structure and, with the etch stop layer in position, forming a self-aligned contact that is conductively coupled to the source/drain region after forming the self-aligned contact. A device disclosed herein includes an etch stop layer that is positioned above a recessed replacement gate structure and recessed sidewall spacers, wherein the etch stop layer defines an etch stop recess that contains a layer of insulating material positioned therein. The device further includes a self-aligned contact.

    Abstract translation: 本文公开的一种方法包括在凹陷的侧壁间隔物和凹入的替换栅极结构上方形成蚀刻停止层,并且将蚀刻停止层置于适当位置,形成在形成自身之后与源/漏区导电耦合的自对准接触 联系人。 本文公开的装置包括位于凹入的替代栅极结构和凹陷的侧壁间隔物之上的蚀刻停止层,其中蚀刻停止层限定了包含定位在其中的绝缘材料层的蚀刻停止凹部。 该装置还包括自对准接触件。

    METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FOR CONDUCTIVE COPPER STRUCTURES AND THE RESULTING DEVICE
    22.
    发明申请
    METHODS OF FORMING COPPER-BASED NITRIDE LINER/PASSIVATION LAYERS FOR CONDUCTIVE COPPER STRUCTURES AND THE RESULTING DEVICE 审中-公开
    导电铜结构和结晶器件形成铜基氮化物/钝化层的方法

    公开(公告)号:US20140361435A1

    公开(公告)日:2014-12-11

    申请号:US14470213

    申请日:2014-08-27

    Abstract: One illustrative method disclosed herein includes forming a trench/via in a layer of insulating material, forming a barrier layer in the trench/via, forming a copper-based seed layer on the barrier layer, converting at least a portion of the copper-based seed layer into a copper-based nitride layer, depositing a bulk copper-based material on the copper-based nitride layer so as to overfill the trench/via and performing at least one chemical mechanical polishing process to remove excess materials positioned outside of the trench/via to thereby define a copper-based conductive structure. A device disclosed herein includes a layer of insulating material, a copper-based conductive structure positioned in a trench/via within the layer of insulating material and a copper-based silicon or germanium nitride layer positioned between the copper-based conductive structure and the layer of insulating material.

    Abstract translation: 本文公开的一种说明性方法包括在绝缘材料层中形成沟槽/通孔,在沟槽/通孔中形成阻挡层,在阻挡层上形成铜基种子层,将至少一部分铜基 种子层形成铜基氮化物层,在铜基氮化物层上沉积大块铜基材料,以覆盖沟槽/通孔,并执行至少一种化学机械抛光工艺,以去除位于沟槽之外的多余材料 / via,从而限定铜基导电结构。 本文公开的装置包括绝缘材料层,位于绝缘材料层内的沟槽/通孔中的铜基导电结构以及位于铜基导电结构和层之间的铜基硅或氮化锗层 的绝缘材料。

    METHODS OF FORMING GRAPHENE LINERS AND/OR CAP LAYERS ON COPPER-BASED CONDUCTIVE STRUCTURES
    23.
    发明申请
    METHODS OF FORMING GRAPHENE LINERS AND/OR CAP LAYERS ON COPPER-BASED CONDUCTIVE STRUCTURES 审中-公开
    在铜基导电结构上形成石墨衬层和/或盖层的方法

    公开(公告)号:US20140145332A1

    公开(公告)日:2014-05-29

    申请号:US13684871

    申请日:2012-11-26

    Abstract: One illustrative method disclosed herein includes forming a trench/via in a layer of insulating material, forming a graphene liner layer in at least the trench/via, forming a copper-based seed layer on the graphene liner layer, depositing a bulk copper-based material on the copper-based seed layer so as to overfill the trench/via, and performing at least one chemical mechanical polishing process to remove at least excess amounts of the bulk copper-based material and the copper-based seed layer positioned outside of the trench/via to thereby define a copper-based conductive structure with a graphene liner layer positioned between the copper-based conductive structure and the layer of insulating material.

    Abstract translation: 本文公开的一种说明性方法包括在绝缘材料层中形成沟槽/通孔,在至少沟槽/通孔中形成石墨烯衬里层,在石墨烯衬层上形成铜基晶种层,沉积大量基于铜的 在铜基种子层上的材料,以便过度填充沟槽/通孔,并进行至少一种化学机械抛光工艺以去除至少过量的大量铜基材料和位于外部的铜基种子层 沟槽/通孔,从而限定铜基导电结构,其中石墨烯衬里层位于铜基导电结构和绝缘材料层之间。

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