公开(公告)号：US10580696B1

公开(公告)日：2020-03-03

申请号：US16106246

申请日：2018-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sean Xuan Lin ,  Christian Witt ,  Mark V. Raymond ,  Nicholas V. LiCausi ,  Errol Todd Ryan

IPC: H01L23/12 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L23/532 ,  H01L21/288

Abstract: Structures for interconnects and methods of forming interconnects. An interconnect opening in a dielectric layer includes a first portion and a second portion arranged over the first portion. A first conductor layer composed of a first metal is arranged inside the first portion of the interconnect opening. A second conductor layer composed of a second metal is arranged inside the second portion of the interconnect opening. The first metal is ruthenium.

公开(公告)号：US20200066585A1

公开(公告)日：2020-02-27

申请号：US16106246

申请日：2018-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sean Xuan Lin ,  Christian Witt ,  Mark V. Raymond ,  Nicholas V. LiCausi ,  Errol Todd Ryan

IPC: H01L21/768 ,  H01L23/532

Abstract: Structures for interconnects and methods of forming interconnects. An interconnect opening in a dielectric layer includes a first portion and a second portion arranged over the first portion. A first conductor layer composed of a first metal is arranged inside the first portion of the interconnect opening. A second conductor layer composed of a second metal is arranged inside the second portion of the interconnect opening. The first metal is ruthenium.

公开(公告)号：US20140145332A1

公开(公告)日：2014-05-29

申请号：US13684871

申请日：2012-11-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Errol T. Ryan ,  Zoran Krivokapic ,  Xunyuan Zhang ,  Christian Witt ,  Ming He ,  Larry Zhao

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L23/53238 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One illustrative method disclosed herein includes forming a trench/via in a layer of insulating material, forming a graphene liner layer in at least the trench/via, forming a copper-based seed layer on the graphene liner layer, depositing a bulk copper-based material on the copper-based seed layer so as to overfill the trench/via, and performing at least one chemical mechanical polishing process to remove at least excess amounts of the bulk copper-based material and the copper-based seed layer positioned outside of the trench/via to thereby define a copper-based conductive structure with a graphene liner layer positioned between the copper-based conductive structure and the layer of insulating material.

Abstract translation: 本文公开的一种说明性方法包括在绝缘材料层中形成沟槽/通孔，在至少沟槽/通孔中形成石墨烯衬里层，在石墨烯衬层上形成铜基晶种层，沉积大量基于铜的 在铜基种子层上的材料，以便过度填充沟槽/通孔，并进行至少一种化学机械抛光工艺以去除至少过量的大量铜基材料和位于外部的铜基种子层 沟槽/通孔，从而限定铜基导电结构，其中石墨烯衬里层位于铜基导电结构和绝缘材料层之间。

公开(公告)号：US20170047242A1

公开(公告)日：2017-02-16

申请号：US14822258

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zhiguo Sun ,  Qiang Fang ,  Christian Witt

IPC: H01L21/764 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L21/764 ,  H01L21/02068 ,  H01L21/02356 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/5222 ,  H01L23/53295

Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.

Abstract translation: 本文公开的一种说明性方法除其他外包括在绝缘材料层中形成多个沟槽，执行至少一个损坏造成处理操作以选择性地损坏邻近沟槽的绝缘材料的部分，在每个沟槽中形成导电线 在形成导电线之后，执行选择性蚀刻工艺以选择性地去除绝缘材料的损坏部分的至少一部分，从而限定横向邻近每条导电线的气隙，并且形成覆盖层 导电线上方的材料，空气间隙和绝缘材料层的未损坏部分。

公开(公告)号：US20160104672A1

公开(公告)日：2016-04-14

申请号：US14511524

申请日：2014-10-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Roderick A. Augur ,  Christian Witt

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L21/76834 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76885 ,  H01L23/53204 ,  H01L23/53271 ,  H01L23/53276 ,  H01L23/53295 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of electrically connecting first and second conductive features includes forming a first metallization layer including the first conductive feature. A ballistic conductor line is formed above the first metallization layer. The ballistic conductor line contacts the first conductive feature proximate a first end of the ballistic conductor line. The second conductive feature is contacted proximate a second end of the ballistic conductor line.

Abstract translation: 电连接第一和第二导电特征的方法包括形成包括第一导电特征的第一金属化层。 在第一金属化层之上形成弹道导线。 弹道导线在靠近弹道导线的第一端接触第一导电特征。 第二导电特征在弹道导线的第二端附近接触。

公开(公告)号：US20150255339A1

公开(公告)日：2015-09-10

申请号：US14201255

申请日：2014-03-07

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan Zhang ,  Hoon Kim ,  Christian Witt ,  Larry Zhao

IPC: H01L21/768 ,  H01L21/306

CPC classification number: H01L21/76882 ,  H01L21/30625 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One method includes forming a barrier layer in a trench/opening in an insulating material, forming a first region of a copper material above the barrier layer, forming a metal layer in the trench/opening on the first region of copper material, forming a second region of copper material on the metal layer, performing at least one CMP process to remove any materials positioned above a planarized upper surface of the layer of insulating material outside of the trench/opening so as to thereby define a structure comprised of the metal layer positioned between the first and second regions of copper material, forming a dielectric cap layer above the layer of insulating material and above the structure, and performing a metal diffusion anneal process to form a metal cap layer adjacent at least the upper surface of a conductive copper structure.

Abstract translation: 一种方法包括在绝缘材料的沟槽/开口中形成阻挡层，在阻挡层之上形成铜材料的第一区域，在铜材料的第一区域上的沟槽/开口中形成金属层，形成第二层 在金属层上的铜材料区域，执行至少一个CMP工艺以去除位于沟槽/开口外部的绝缘材料层的平坦化上表面上方的任何材料，从而限定由金属层定位的结构 在铜材料的第一和第二区域之间，在绝缘材料层之上并在结构之上形成电介质盖层，并进行金属扩散退火工艺以形成至少与导电铜结构的上表面相邻的金属盖层 。

公开(公告)号：US08932934B2

公开(公告)日：2015-01-13

申请号：US13903283

申请日：2013-05-28

Applicant: GlobalFoundries Inc.

Inventor： Moosung M. Chae ,  Errol Todd Ryan ,  Nicholas Vincent Licausi ,  Christian Witt ,  Ailian Zhao ,  Ming He ,  Sean X. Lin ,  Xunyuan Zhang ,  Kunaljeet Tanwar

IPC: H01L21/76 ,  H01L21/768 ,  H01L23/48 ,  H01L21/316 ,  H01L21/02

CPC classification number: H01L21/76831 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76843 ,  H01L2221/1047

Abstract: A process is provided for methods of reducing contamination of the self-forming barrier of an ultra-low k layer during semiconductor fabrication. In one aspect, a method includes: providing a cured ultra-low k film which contains at least one trench, and the pores of the film are filled with a pore-stuffing material; removing exposed pore-stuffing material at the surface of the trench to form exposed pores; and forming a self-forming barrier layer on the surface of the trench.

Abstract translation: 提供了一种用于在半导体制造期间减少超低k层的自形成势垒的污染的方法的方法。 一方面，一种方法包括：提供包含至少一个沟槽的固化的超低k膜，并且用孔填充材料填充膜的孔; 在沟槽的表面去除暴露的孔隙填充材料以形成暴露的孔; 并在沟槽的表面上形成自形成阻挡层。

公开(公告)号：US09768058B2

公开(公告)日：2017-09-19

申请号：US14822258

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zhiguo Sun ,  Qiang Fang ,  Christian Witt

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/02 ,  H01L21/764 ,  H01L23/52

CPC classification number: H01L21/764 ,  H01L21/02068 ,  H01L21/02356 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/5222 ,  H01L23/53295

Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.

公开(公告)号：US20160104670A1

公开(公告)日：2016-04-14

申请号：US14511344

申请日：2014-10-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Roderick A. Augur ,  Christian Witt

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76834 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/53204 ,  H01L23/53271 ,  H01L23/53276 ,  H01L23/53295 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a ballistic conductor line above a first metallization layer. A dielectric layer is formed above the ballistic conductor line. A first via is embedded in the dielectric layer contacting a first portion of the ballistic conductor line. A second via is embedded in the dielectric layer contacting a second portion of the ballistic conductor line to define a signal path between the first and second vias through the ballistic conductor line.

Abstract translation: 一种方法包括在第一金属化层之上形成弹道导体线。 在弹道导线之上形成电介质层。 第一通孔嵌入到接触弹道导体线的第一部分的电介质层中。 第二通孔嵌入在接触弹道导体线的第二部分的电介质层中，以通过弹道导线确定第一和第二通孔之间的信号路径。

公开(公告)号：US09236299B2

公开(公告)日：2016-01-12

申请号：US14201255

申请日：2014-03-07

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan Zhang ,  Hoon Kim ,  Christian Witt ,  Larry Zhao

IPC: H01L21/44 ,  H01L21/768 ,  H01L21/306

CPC classification number: H01L21/76882 ,  H01L21/30625 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One method includes forming a barrier layer in a trench/opening in an insulating material, forming a first region of a copper material above the barrier layer, forming a metal layer in the trench/opening on the first region of copper material, forming a second region of copper material on the metal layer, performing at least one CMP process to remove any materials positioned above a planarized upper surface of the layer of insulating material outside of the trench/opening so as to thereby define a structure comprised of the metal layer positioned between the first and second regions of copper material, forming a dielectric cap layer above the layer of insulating material and above the structure, and performing a metal diffusion anneal process to form a metal cap layer adjacent at least the upper surface of a conductive copper structure.

Abstract translation: 一种方法包括在绝缘材料的沟槽/开口中形成阻挡层，在阻挡层之上形成铜材料的第一区域，在铜材料的第一区域上的沟槽/开口中形成金属层，形成第二层 在金属层上的铜材料区域，执行至少一个CMP工艺以去除位于沟槽/开口外部的绝缘材料层的平坦化上表面上方的任何材料，从而限定由金属层定位的结构 在铜材料的第一和第二区域之间，在绝缘材料层之上并在结构之上形成电介质盖层，并进行金属扩散退火工艺以形成至少与导电铜结构的上表面相邻的金属盖层 。