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公开(公告)号:US20250079345A1
公开(公告)日:2025-03-06
申请号:US18242906
申请日:2023-09-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ian McCallum-Cook , Mark Levy , Zhong-Xiang He
Abstract: Structures including a wide band-gap semiconductor layer stack and methods of forming such structures. The structure comprises a layer stack on a substrate and a first dielectric layer on the layer stack. The layer stack includes semiconductor layers that comprise a wide band-gap semiconductor material. A seal ring includes a trench that penetrates through the first dielectric layer and the layer stack to the substrate, a second dielectric layer that lines the trench, and a conductor layer including first and second portions inside the trench. The trench surrounds portions of the layer stack and the first dielectric layer. The second dielectric layer includes a first portion disposed between the first portion of the conductor layer and the portion of the layer stack, and the second dielectric layer includes a second portion disposed between the second portion of the conductor layer and the portion of the first dielectric layer.
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公开(公告)号:US12040252B2
公开(公告)日:2024-07-16
申请号:US17858660
申请日:2022-07-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ramsey Hazbun , Cameron Luce , Siva P. Adusumilli , Mark Levy
IPC: H01L23/473 , H01L21/762 , H01L23/367 , H01L29/51
CPC classification number: H01L23/473 , H01L21/76229 , H01L23/367 , H01L29/515
Abstract: Structures for a microfluidic channel and methods of forming a structure for a microfluidic channel. The structure comprises a trench in a semiconductor substrate and a semiconductor layer inside the trench. The trench has an entrance and a sidewall extending from the entrance into the semiconductor substrate. The semiconductor layer has a first portion surrounding a portion of the trench to define a cavity and a second portion positioned to obstruct the entrance to the trench. The second portion of the semiconductor layer is thicker than the first portion of the semiconductor layer.
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23.
公开(公告)号:US20240222366A1
公开(公告)日:2024-07-04
申请号:US18604627
申请日:2024-03-14
Applicant: GlobalFoundries U.S. Inc.
Inventor: Mark Levy , Jeonghyun Hwang , Siva P. Adusumilli
CPC classification number: H01L27/0605 , H01L21/8258 , H01L27/0623 , H01L29/045 , H01L29/0649 , H01L29/16 , H01L29/2003
Abstract: Structures including devices, such as transistors, integrated on a bulk semiconductor substrate and methods of forming a structure including devices, such as transistors, integrated on a bulk semiconductor substrate. The bulk semiconductor substrate contains a single-crystal semiconductor material having a diamond crystal lattice structure and a crystal orientation. A first transistor is formed in a first device region of the bulk semiconductor substrate, and a second transistor is formed in a second device region of the bulk semiconductor substrate. The second transistor includes a layer stack on the bulk semiconductor substrate, and the layer stack includes a layer comprised of a III-V compound semiconductor material.
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公开(公告)号:US20240159962A1
公开(公告)日:2024-05-16
申请号:US17985223
申请日:2022-11-11
Applicant: GlobalFoundries U.S. Inc.
Inventor: Mark Levy , Siva P. Adusumilli , Yusheng Bian
CPC classification number: G02B6/122 , G02B6/13 , G02B2006/12078
Abstract: Structures for a waveguide and methods of forming a waveguide. The structure comprises a substrate, a waveguide core comprising a compound semiconductor material, and a layer disposed on the substrate. The layer comprises the compound semiconductor material, and the layer includes a cavity positioned beneath the waveguide core.
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公开(公告)号:US20230223254A1
公开(公告)日:2023-07-13
申请号:US17571932
申请日:2022-01-10
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ramsey Hazbun , Mark Levy , Alvin Joseph , Siva P. Adusumilli
IPC: H01L21/02 , H01L29/66 , H01L29/20 , H01L27/085 , H01L21/762
CPC classification number: H01L21/0243 , H01L21/02381 , H01L21/76224 , H01L27/085 , H01L29/2003 , H01L29/66462 , H01L21/02433
Abstract: Structures including a compound-semiconductor-based device and a silicon-based device integrated on a semiconductor substrate and methods of forming such structures. The structure includes a first semiconductor layer having a top surface and a faceted surface that fully surrounds the top surface. The top surface has a first surface normal, and the faceted surface has a second surface normal that is inclined relative to the first surface normal. A layer stack that includes second semiconductor layers is positioned on the faceted surface of the first semiconductor layer. Each of the second semiconductor layers contains a compound semiconductor material. A silicon-based device is located on the top surface of the first semiconductor layer, and a compound-semiconductor-based device is located on the layer stack.
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26.
公开(公告)号:US11469225B2
公开(公告)日:2022-10-11
申请号:US17072649
申请日:2020-10-16
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Mark Levy , Jeonghyun Hwang , Siva P. Adusumilli
Abstract: Structures including devices, such as transistors, integrated on a bulk semiconductor substrate and methods of forming a structure including devices, such as transistors, integrated on a bulk semiconductor substrate. The bulk semiconductor substrate contains a single-crystal semiconductor material having a diamond crystal lattice structure and a crystal orientation. A first transistor is formed in a first device region of the bulk semiconductor substrate, and a second transistor is formed in a second device region of the bulk semiconductor substrate. The second transistor includes a layer stack on the bulk semiconductor substrate, and the layer stack includes a layer comprised of a III-V compound semiconductor material.
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27.
公开(公告)号:US20210376159A1
公开(公告)日:2021-12-02
申请号:US16890063
申请日:2020-06-02
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Michel J. Abou-Khalil , Steven M. Shank , Mark Levy , Rajendran Krishnasamy , John J. Ellis-Monaghan , Anthony K. Stamper
IPC: H01L29/786 , H01L29/423 , H01L29/06 , H01L21/763
Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A shallow trench isolation region is formed in a semiconductor substrate. A trench is formed in the shallow trench isolation region, and a body region is formed in the trench of the shallow trench isolation region. The body region is comprised of a polycrystalline semiconductor material.
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