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    MEMORY POWER TERMINATION DELAYS
    22.
    发明申请
    MEMORY POWER TERMINATION DELAYS 有权

    公开(公告)号：US20210089404A1

    公开(公告)日：2021-03-25

    申请号：US16980880

    申请日：2018-06-11

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Monji G. Jabori ,  Byron A. Alcorn ,  Jonathan Vu

    IPC: G06F11/14 ,  G11C5/14 ,  G06F1/3203

    Abstract: Example implementations relate to memory power termination delays. In some examples, a computing system may include a memory storage device, a memory controller, an input/output (I/O) controller, a power management controller (PMC), a bus compliant with an Enhanced Serial Peripheral Interface (eSPI) protocol, and a power control gating. The input/output controller may transmit a power termination command to the power management controller via the bus compliant with the eSPI protocol. Upon a receipt of the power termination command, the PMC may initiate a delay period of an assertion of the power termination command to the power control gating and transmit a memory transfer command to the memory controller included in the memory storage device. The memory controller, upon receipt of the memory transfer command, may move data stored in volatile memory to non-volatile memory included in the memory storage device. Upon expiration of the delay period, the PMC may assert the power termination command to the power control gating to remove power from the computing system.

    DELAY OF POWER OFF TO WRITE DATA FROM VOLATILE TO NON-VOLATILE MEMORY OF A SOLID STATE DRIVE
    23.
    发明申请
    DELAY OF POWER OFF TO WRITE DATA FROM VOLATILE TO NON-VOLATILE MEMORY OF A SOLID STATE DRIVE 审中-公开

    公开(公告)号：US20200233474A1

    公开(公告)日：2020-07-23

    申请号：US16482970

    申请日：2017-02-01

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Byron A. Alcorn ,  Shane Ward ,  Ronald G. Rogers ,  Lance Ceili

    IPC: G06F1/28 ,  G06F3/06

    Abstract: In an example, a method, non-transitory machine-readable storage medium, and apparatus is described for preserving data in a solid state drive in the event of an unclean shutdown of the host computing system. A controller of the host computing system detects an unclean shutdown that initiates a power down of the host computing system, In response to the detecting the controller asserts a first signal that signals the solid state drive to write data in a volatile memory of the solid state drive to a non-volatile memory of the solid state drive, The controller then initiates a timer to count down a predefined delay period after the asserting. Upon an expiration of the timer, the controller asserts a second signal that instructs a power supply of the host computing system to power off.

    Memory card expansion
    24.
    发明授权
    Memory card expansion 有权

    公开(公告)号：US10545901B2

    公开(公告)日：2020-01-28

    申请号：US15543207

    申请日：2015-01-29

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Peter Seiler ,  Shane Ward ,  Byron A. Alcorn ,  Raphael Gay

    IPC: G06F13/40 ,  G06F13/16

    Abstract: An apparatus includes a memory card that includes at least one memory module and an expansion connector to connect with at least one expansion memory card. A lane distributor on the memory card interfaces with a set of bidirectional lanes and provides a base lane set and an expanded lane set of bidirectional lanes to support communications with the memory module and the expansion memory card via the expansion connector.

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