-
公开(公告)号：US07522000B2
公开(公告)日：2009-04-21
申请号：US12114984
申请日：2008-05-05
IPC分类号： H03F3/45
CPC分类号： H03F1/523 , H03F1/52 , H03F3/45183 , H03F3/45632 , H03F2203/45244 , H03F2203/45342 , H03F2203/45456 , H03F2203/45466 , H03F2203/45702
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.
摘要翻译： 一种体现在机器可读存储介质中的设计结构，用于设计，制造和/或测试设计，用于传输由具有有限的最大电压容限的薄氧化物晶体管形成的差分放大器所需的较高幅度输出，这些最小电压容限符合通信协议 标准要求处理电压，在转换期间，可以通过在断电条件下限制任何两个器件端子上的电压来提供所需的电平。
-
22.发明授权Nodal charge compensation for SST driver having data mux in output stage 失效具有输出级数据复用器的SST驱动器的节点充电补偿公开(公告)号：US07511530B1
公开(公告)日：2009-03-31
申请号：US12179957
申请日：2008-07-25
IPC分类号： H03K19/0175 , H04L25/02
CPC分类号： H03K19/018507 , H03K17/693 , H04L25/0272
摘要： An (SST) driver circuit having additional circuitry for minimizing data-dependent jitter in the SST driver and increasing frequency amplitude in the SST driver. The additional circuity comprises a plurality of switches configured to be turned on or pulsed on momentarily during operation to discharge a node in the SST output stage for the purpose of removing the stored charge before the next transition cycle of the output stage.
摘要翻译： 具有用于最小化SST驱动器中的数据相关抖动并且增加SST驱动器中的频率振幅的附加电路的（SST）驱动器电路。 附加电路包括多个开关，其被配置为在操作期间暂时导通或脉冲以对SST输出级中的节点放电，以便在输出级的下一个转换周期之前去除存储的电荷。
-
公开(公告)号：US07501880B2
公开(公告)日：2009-03-10
申请号：US10906628
申请日：2005-02-28
IPC分类号： G05F1/10
CPC分类号： G05F3/262
摘要： A body-biased enhanced current mirror circuit is disclosed wherein the body voltage of a current mirror device is adjusted to compensate for the effect of changes in the output voltage on the output current, increasing the output impedance. For each instance of the current mirror, this approach has the advantage of requiring no additional margin in operating voltage and of consuming no more circuit area than prior art current mirror designs. In addition, the body-biased enhanced current mirror circuit provides a stable reference current to output current ratio over a wide operating range. An auxiliary MOSFET current mirror device with the body connected to ground may be added in parallel with the body-biased current mirror device to eliminate a non-monotonicity of the current output.
摘要翻译： 公开了体偏置增强电流镜电路，其中调整电流镜装置的体电压以补偿输出电压对输出电流的变化的影响，增加输出阻抗。 对于电流镜的每个实例，这种方法的优点在于不需要额外的工作电压余量，并且消耗的电路面积比现有技术的电流镜设计更多。 此外，体偏置增强电流镜电路在宽的工作范围内提供稳定的参考电流至输出电流比。 可以将主体连接到地的辅助MOSFET电流镜装置与主体偏置电流镜装置并联，以消除电流输出的非单调性。
-
公开(公告)号：US20090024972A1
公开(公告)日：2009-01-22
申请号：US12163025
申请日：2008-06-27
申请人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
发明人： Igor Arsovski , Anthony R. Bonaccio , Serafino Bueti , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Todd E. Leonard , Hemen R. Shah , Pradeep Thiagarajan , Sebastian T. Ventrone
IPC分类号： G06F17/50
CPC分类号： G06F1/206 , Y02D10/16 , Y10T307/773
摘要： Design structures, method and systems of powering on an integrated circuit (IC) are disclosed. In one embodiment, the system includes a region in the IC including functional logic, a temperature sensor for sensing a temperature in the region when the IC is powered up and a heating element therefor; a processing unit including: a comparator for comparing the temperature against a predetermined temperature value, a controller, which in the case that the temperature is below the predetermined temperature value, delays functional operation of the IC and controls heating of the region of the IC, and a monitor for monitoring the temperature in the region; and wherein the controller, in the case that the temperature rises above the predetermined temperature value, ceases the heating and initiates functional operation of the IC.
摘要翻译： 公开了对集成电路（IC）供电的设计结构，方法和系统。 在一个实施例中，该系统包括IC中的包括功能逻辑的区域，用于感测IC上电时该区域中的温度的温度传感器及其加热元件; 处理单元，包括：用于将温度与预定温度值进行比较的比较器，在温度低于预定温度值的情况下的控制器，延迟IC的功能操作并控制IC的区域的加热， 以及监测该区域的温度的监测器; 并且其中所述控制器在所述温度升高到所述预定温度值以上的情况下停止所述加热并且启动所述IC的功能操作。
-
公开(公告)号：US07411422B2
公开(公告)日：2008-08-12
申请号：US11103789
申请日：2005-04-12
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H04L25/03885 , H04L25/0272 , H04L25/03343
摘要： A high speed serial data communication system includes provisions for the correction of equalization errors, particularly those errors introduced by equalizer non-idealities. The equalization is achieved at the data transmitter, and is based on dynamic current subtraction at the output of a differential pair. When bit time>0, the error current is removed or subtracted from the total driver current, thereby maintaining a constant total current from bit time 0 to bit time>0. The same result can also be achieved by subtracting current when bit time>0 using field effect transistors of the opposite gender. The error current can be determined empirically from simulation or through feedback using a replica of the driver. The circuits for achieving equalization error correction and the resulting electrical network analysis are shown and described.
摘要翻译： 高速串行数据通信系统包括用于校正均衡误差的规定，特别是由均衡器非理想性引入的错误。 在数据发射机上实现均衡，并且基于差分对的输出处的动态电流减法。 当位时间> 0时，误差电流从总驱动器电流中去除或减去，从而保持从位时间0到位时间> 0的恒定总电流。 通过使用相反性别的场效应晶体管减去位时间> 0时的电流，也可以实现相同的结果。 误差电流可以从仿真或使用驱动程序的副本通过反馈凭经验确定。 用于实现均衡纠错的电路和所得到的电网分析被显示和描述。
-
26.发明授权System and method for transmitting data and additional information simultaneously within a wire based communication system 有权用于在有线通信系统内同时发送数据和附加信息的系统和方法公开(公告)号：US07346094B2
公开(公告)日：2008-03-18
申请号：US10319705
申请日：2002-12-13
IPC分类号： H04B1/00
CPC分类号： H04B1/707
摘要： A system and method is provided for transmitting data signals and additional information signals having partially overlapping frequency bands simultaneously within a wire based communication system over the same wired medium using a spread spectrum technique for modulating the additional information signals.
摘要翻译： 提供了一种系统和方法，用于使用用于调制附加信息信号的扩展频谱技术，在同一有线介质上，在有线通信系统内同时传输具有部分重叠频带的数据信号和附加信息信号。
-
27.发明授权Structure and method for providing gate leakage isolation locally within analog circuits 失效在模拟电路中局部提供栅极泄漏隔离的结构和方法公开(公告)号：US07268632B2
公开(公告)日：2007-09-11
申请号：US11163013
申请日：2005-09-30
CPC分类号： H03L7/093 , H03L7/0891
摘要： A loop filter for a phase-locked-loop is provided, comprising a set of capacitor banks coupled in parallel to form the loop filter, and a detection circuit for identifying and isolating defective capacitor banks. A method for providing a loop filter for a phase-locked-loop in accordance with an embodiment of the present invention includes the steps of forming the loop filter using a set of capacitor banks coupled in parallel, detecting any defective capacitor banks in the set of capacitor banks, isolating each defective capacitor bank, providing a set of redundant capacitor banks, and replacing each defective capacitor bank with a redundant capacitor bank from the set of redundant capacitor banks.
摘要翻译： 提供了一种用于锁相环的环路滤波器，包括并联耦合以形成环路滤波器的一组电容器组，以及用于识别和隔离有缺陷的电容器组的检测电路。 根据本发明实施例的用于提供用于锁相环的环路滤波器的方法包括以下步骤：使用并联耦合的一组电容器组形成环路滤波器，检测该组中的任何有缺陷的电容器组 电容器组，隔离每个有缺陷的电容器组，提供一组冗余电容器组，并从冗余电容器组组中的冗余电容器组替换每个有缺陷的电容器组。
-
公开(公告)号：US07268613B2
公开(公告)日：2007-09-11
申请号：US11263008
申请日：2005-10-31
IPC分类号： G05F3/02
CPC分类号： H03K17/161 , H03K2217/0018
摘要： A circuit device having a transistor-based switch topology that substantially eliminates the possibility of latchup of the device. A series-connected low voltage threshold (LVT) N-channel transistor and a pull-up resistor are coupled across a switching (P-channel) transistor so that an integral body connection is provided for the switching transistor, which connects the body of the switching transistor to a node between the pull-up resistor and source terminal of the LVT transistor. The LVT transistor is connected with its gate and drain terminal connected to the output terminal of the switching transistor. The resistor is connected at its other end to the power supply side terminal of the switching transistor. The addition of these components in the particular configuration allows the body connection of the switching transistor to be automatically switched to the highest potential diffusion node.
摘要翻译： 一种具有基于晶体管的开关拓扑的电路器件，其基本上消除了器件闭锁的可能性。 串联的低电压阈值（LVT）N沟道晶体管和上拉电阻跨越开关（P沟道）晶体管耦合，以便为开关晶体管提供一体的主体连接，开关晶体管连接 开关晶体管连接到LVT晶体管的上拉电阻和源极端子之间的一个节点。 LVT晶体管的栅极和漏极端子连接到开关晶体管的输出端子。 电阻器的另一端连接到开关晶体管的电源侧端子。 在特定配置中添加这些组件允许开关晶体管的主体连接自动切换到最高电位扩散节点。
-
29.发明授权Method and circuit for increased noise immunity for clocking signals in high speed digital systems 失效用于提高高速数字系统中时钟信号抗噪声的方法和电路公开(公告)号：US07034566B2
公开(公告)日：2006-04-25
申请号：US10777952
申请日：2004-02-12
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H03K19/0005 , H03K19/018585
摘要： Aspects for increased noise immunity for clocking signals in high speed digital systems are described. The aspects include buffering a differential clock signal with a single buffer circuit for a plurality of load circuits and configuring the single buffer circuit to adjust to alterations in the number of load circuits receiving the differential clock signal. The configuring achieves a constant bandwidth and voltage level for the clock signal output while adjusting to alterations in the number of load circuits.
摘要翻译： 描述了用于在高速数字系统中提高时钟信号的抗噪声性的方面。 这些方面包括使用用于多个负载电路的单个缓冲电路来缓冲差分时钟信号，并且配置单个缓冲器电路以适应接收差分时钟信号的负载电路的数量的变化。 配置在调整到负载电路数量的变化时，可实现时钟信号输出的恒定带宽和电压电平。
-
公开(公告)号：US08183920B2
公开(公告)日：2012-05-22
申请号：US12828238
申请日：2010-06-30
IPC分类号： H03F3/45
CPC分类号： H03G3/004 , H03F1/0205 , H03F3/189 , H03F3/45632 , H03F2200/294 , H03F2200/555 , H03F2203/45418
摘要： A variable gain amplifier includes a first common mode (CM) node configured to receive a first differential signal of a pair of differential signals. A first regulator couples to the first CM node, the first regulator being configured to generate a first CM offset. A second CM node is configured to receive a second differential signal of the pair of differential signals. A second regulator couples to the second CM node, the second regulator being configured to generate a second CM offset. In one embodiment, the first CM offset and the second CM offset together comprise a net CM offset, the net CM offset being configured to replace a current source net offset.
摘要翻译： 可变增益放大器包括被配置为接收一对差分信号的第一差分信号的第一共模（CM）节点。 第一调节器耦合到第一CM节点，第一调节器被配置为生成第一CM偏移。 第二CM节点被配置为接收该对差分信号的第二差分信号。 第二调节器耦合到第二CM节点，第二调节器被配置为生成第二CM偏移。 在一个实施例中，第一CM偏移和第二CM偏移量一起包括净CM偏移，净CM偏移被配置为替换当前源净偏移。
-
-
-
-
-
-
-
-
-
搜索结果
93 条记录 (耗时 0.041 秒)
