公开(公告)号：US20050025084A1

公开(公告)日：2005-02-03

申请号：US10499401

申请日：2002-12-10

申请人： Patrick Heuts ,  Hendrik Boezen ,  Harm Voss ,  Stefan Butselaar

发明人： Patrick Heuts ,  Hendrik Boezen ,  Harm Voss ,  Stefan Butselaar

IPC分类号： G06F1/26 ,  G06F1/32 ,  G06F3/00 ,  H04B1/38 ,  H04L12/28 ,  H04L29/00 ,  H04B7/14

CPC分类号： G06F1/3253 ,  G06F1/3203 ,  Y02D10/151

摘要： The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a normal mode. The transceiver circuit (124, 164) is powered down in a sleep mode. A detector circuit (120, 160) detects an incoming message (41) when the relay circuit (12, 14, 16) is in a sleep mode. A mode control circuit (122, 162) powers up the transceiver (124, 164) in response to detection of an incoming message (21). Steps are taken that ensure, in the normal mode, that messages (21) will not be relayed in unreadable form. The mode control circuit (122, 162) is arranged to cause the transceiver (124, 164) to relay a remainder (25) of the incoming message (21) after power up. In an embodiment the power needed to transmit the remainder (25) of the message (21) is drained from a capacitor (306) in the power supply (30) before the power supply (30) controls the power supply voltage in the normal mode. In another embodiment the detector circuit (120, 160) temporarily controls the direction of operation of the transceivers (124, 164) at the start of the normal mode instead of further detectors (58a-d) that normally control the direction of operation in the normal mode.

摘要翻译： 通信总线系统包括多个节点电路（10a-d）和耦合节点电路（10a-d）的继电器电路（12,14,16）。 继电器电路（12,14,16）具有用于以正常模式中继节点电路（10a-d）之间的消息（21）的收发器电路（124,164）。 在休眠模式下，收发器电路（124,164）被掉电。 当继电器电路（12,14,16）处于睡眠模式时，检测器电路（120,160）检测输入消息（41）。 模式控制电路（122,162）响应于输入消息（21）的检测，对收发器（124,164）供电。 采取步骤，确保在正常模式下，消息（21）将不会以不可读的形式进行中继。 模式控制电路（122,162）被布置成使得收发器（124,164）在上电之后中继输入消息（21）的余数（25）。 在一个实施例中，在电源（30）以正常模式控制电源电压之前，将消息（21）的剩余部分（25）所需的功率从电源（30）中的电容器（306）中排出 。 在另一个实施例中，检测器电路（120,160）在正常模式开始时暂时控制收发器（124,164）的操作方向，而不是通常控制在正常模式下的操作方向的另外的检测器（58a-d） 正常模式。

公开(公告)号：US06664821B2

公开(公告)日：2003-12-16

申请号：US10095400

申请日：2002-03-11

申请人： Clemens Gerhardus Johannes De Haas ,  Hendrik Boezen ,  Aloysius Johannes Maria Boomkamp ,  Gerrit Jan Bollen ,  Abraham Klaas Van Den Heuvel ,  Ruurd Anne Visser

发明人： Clemens Gerhardus Johannes De Haas ,  Hendrik Boezen ,  Aloysius Johannes Maria Boomkamp ,  Gerrit Jan Bollen ,  Abraham Klaas Van Den Heuvel ,  Ruurd Anne Visser

IPC分类号： H03K300

CPC分类号： H04L25/028

摘要： Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) provides a ramp shaped output current under control of a ramp generator (RG). The ramp shaped output current in combination with the pull-up resistor (R1) asserts a ramp shaped output voltage on the LIN-bus wire (LB). According to the LIN-bus specifications the resistance of the pull-up resistor may vary between 500 Ohm and 1 kOhm. When the resistance is 1 kOhm, the output voltage is clamped to signal ground (GND) and a delay occurs between the edge in the data signal (TXD) and the corresponding rising ramp in the output voltage. This delay is reduced considerably by a comparator (CMP, T2) which monitors the output voltage and which increases the slew rate of the ramp generator (RG) when the output voltage is clamped and drops below a certain threshold.

公开(公告)号：US06420911B1

公开(公告)日：2002-07-16

申请号：US08705569

申请日：1996-08-29

申请人： Leonardus F. P. Warmerdam ,  Hendrik Boezen

发明人： Leonardus F. P. Warmerdam ,  Hendrik Boezen

IPC分类号： G05F326

CPC分类号： G05F1/561

摘要： A ballast circuit for operating a lamp provided with a voltage-current converter, the ballast circuit having a differential amplifier provided with a first input terminal for connection to a reference voltage source for generating a reference voltage, a second input terminal for connection of a reference resistor, and an output. A first current generator supplies a first current to the reference resistor. A current amplifier generates a second current and is provided with an input coupled to the output of the differential amplifier. The differential amplifier is provided with a low-pass filter. The current amplifier on the one hand and the current generator and the reference resistor on the other hand exclusively comprise mutually separate components. The ballast circuit is in addition provided with a current control circuit coupled to the current amplifier and to the current generator for influencing the first current dependent upon the second current. As a result, an interference signal present at the second input terminal causes no appreciable interference in the second current.

摘要翻译： 一种镇流器电路，用于操作具有电压 - 电流转换器的灯，所述镇流器电路具有差分放大器，该差分放大器设置有用于连接到用于产生参考电压的参考电压源的第一输入端子，用于连接参考电压的第二输入端子 电阻和输出。 第一电流发生器向参考电阻器提供第一电流。 电流放大器产生第二电流并且被提供有耦合到差分放大器的输出的输入。 差分放大器配有低通滤波器。 另一方面，电流放大器和电流发生器和参考电阻器独占地包括相互分离的部件。 镇流器电路还具有耦合到电流放大器和电流发生器的电流控制电路，用于影响取决于第二电流的第一电流。 结果，存在于第二输入端子处的干扰信号在第二电流中不产生明显的干扰。

公开(公告)号：US06400192B2

公开(公告)日：2002-06-04

申请号：US09808276

申请日：2001-03-14

申请人： Hendrik Boezen ,  Abraham Klaas Van Den Heuvel

发明人： Hendrik Boezen ,  Abraham Klaas Van Den Heuvel

IPC分类号： H03K300

CPC分类号： H03K5/1515

摘要： An electronic circuit having first (VSS) and second (VDD) power supply terminals and comprising a first digital driver (DRV) and a further digital driver (DRVF). The digital drivers (DRV, DRVF) are arranged for driving capacitive loads such as charge pump capacitors (CP1, CP2) of a charge pump (CHGP). The first digital driver (DRV) comprises a first field effect transistor (T1) having a source coupled to the first power supply terminal (VSS), a drain coupled for driving the first charge pump capacitor (CP1), and a gate; a second field effect transistor (T2) having a source coupled to the second power supply terminal (VDD), a drain coupled to the drain of the first field effect transistor (T1), and a gate; a first capacitor (C1) coupled between the gate of the first field effect transistor (T1) and an input terminal (CLK) for receiving a digital input signal (UCLK); and a second capacitor (C2) coupled between the gate of the second field effect transistor (T2) and the input terminal (CLK). The further digital driver (DRVF) is constructed in a similar way as the digital driver (DRV). DC paths are formed between the gates of field effect transistors (T1-T4) and the supply terminals (VSS, VDD). Owing to the special construction of the digital drivers (DRV, DRVF), there is never a short-circuit current between the digital drivers (DRV, DRVF). As a result, the digital drivers (DRV, DRVF) have a very high power efficiency.

摘要翻译： 一种具有第一（VSS）和第二（VDD）电源端子并包括第一数字驱动器（DRV）和另外的数字驱动器（DRVF）的电子电路。 数字驱动器（DRV，DRVF）被布置用于驱动电容性负载，例如电荷泵（CHGP）的电荷泵电容器（CP1，CP2）。 第一数字驱动器（DRV）包括具有耦合到第一电源端子（VSS）的源极的第一场效应晶体管（T1），用于驱动第一电荷泵电容器（CP1）的漏极和栅极; 具有耦合到第二电源端子（VDD）的源极的第二场效应晶体管（T2），耦合到第一场效应晶体管（T1）的漏极的漏极和栅极; 耦合在第一场效应晶体管（T1）的栅极和用于接收数字输入信号（UCLK）的输入端（CLK）之间的第一电容器（C1）; 以及耦合在第二场效应晶体管（T2）的栅极和输入端子（CLK）之间的第二电容器（C2）。 另外的数字驱动器（DRVF）的构造方式与数字驱动器（DRV）类似。 在场效应晶体管（T1-T4）和电源端子（VSS，VDD）的栅极之间形成DC路径。 由于数字驱动器（DRV，DRVF）的特殊构造，数字驱动器（DRV，DRVF）之间始终没有短路电流。 因此，数字驱动器（DRV，DRVF）具有非常高的功率效率。

公开(公告)号：US5898729A

公开(公告)日：1999-04-27

申请号：US541380

申请日：1995-10-10

申请人： Hendrik Boezen ,  Harald Eisele

发明人： Hendrik Boezen ,  Harald Eisele

IPC分类号： H03K19/018 ,  H04L25/02 ,  H04L25/08 ,  H04L27/00

CPC分类号： H04L25/0272 ,  H04L25/028 ,  H04L25/0292 ,  H04L25/08

摘要： In a transmission system a transmitter (12) is coupled to a receiver (13) via a transmission line comprising two wires (1,2). The transmitter (12) generates on said wires two voltages with respect to a reference voltage being opposite in phase. To enable the transmission system to operate in case of a short circuit between the wires (1,2), said two voltages are generated by sources having different short circuit currents.

摘要翻译： 在传输系统中，发射机（12）经由包括两条线（1,2）的传输线耦合到接收机（13）。 发射器（12）在所述导线上产生相对于相位相反的参考电压的两个电压。 为了使传输系统在导线（1,2）之间短路的情况下工作，所述两个电压由具有不同短路电流的源产生。

公开(公告)号：US5229733A

公开(公告)日：1993-07-20

申请号：US889032

申请日：1992-05-26

申请人： Hendrik Boezen ,  Rafael A. G. Goes ,  Arnoldus B. H. J. Basten

发明人： Hendrik Boezen ,  Rafael A. G. Goes ,  Arnoldus B. H. J. Basten

IPC分类号： H03F1/52

CPC分类号： H03F1/52

摘要： An amplifier arrangement includes a first amplifier (A1) having a first output terminal (5) for the connection of a first terminal of a load and having at least a first power transistor (PT1) with a main current path for carrying a first current (i1), which current (i1) is related to a first load current flowing via the first output terminal (5), a second amplifier (A2) having a second output terminal (6) for the connection of a second terminal of the load and having at least a second power transistor (PT2) with a main current path for carrying a second current (i2), which current (i2) is related to a second load current flowing via the second output terminal (6) a first circuit (M1) for generating a first signal (s1), which signal (s1) is related to the first current (i1), a second circuit (M2) for generating a second signal (s2), which signal (s2) is related to the second current (i2), a third circuit (M3) for generating at least one control signal (r1, r2), which control signal (r1, r2) is related to a sum of the first (s1) and the second (s2) signal, and a protection circuit for limiting the first and the second load current depending upon the control signal (r1, r2), the third circuit (M3), in addition to being adapted to generate the control signal (r1, r2), being adapted to supply a first short-circuit current (k1) to one of the output terminals (5, 6) during a first short-circuit mode and to supply a second short-circuit current (k2) to one of the output terminal (5, 6) during a second short-circuit mode, which short-circuit currents (k1, k2) are related to the sum of the first (s1) and the second (s2) signal.

公开(公告)号：US5185651A

公开(公告)日：1993-02-09

申请号：US552738

申请日：1990-07-12

申请人： Hendrik Boezen

发明人： Hendrik Boezen

IPC分类号： H01L21/3205 ,  H01L21/822 ,  H01L23/52 ,  H01L27/01 ,  H01L27/04 ,  H01L27/08

CPC分类号： H01L27/016 ,  H01L27/0802 ,  Y10S257/923

摘要： An apparatus for monitoring the current in an integrated circuit provided with a current conductor which is to supply current to a semiconductor structure at least temporarily and to supply current to other parts of the circuit. The current conductor is locally split into a first and a second parallel partial current conductor, with the semiconductor structure connected to the first partial current conductor. The first and second partial current conductors are connected to respective first and second connection contacts across which a voltage drop can be derived which is a measure of the value of the current flowing through the semiconductor structure.

公开(公告)号：US5065113A

公开(公告)日：1991-11-12

申请号：US547888

申请日：1990-07-02

申请人： Hendrik Boezen ,  Pieter Buitendijk ,  Rudolf W. Mathijssen

发明人： Hendrik Boezen ,  Pieter Buitendijk ,  Rudolf W. Mathijssen

IPC分类号： H03F1/02 ,  H03F1/22 ,  H03F3/21 ,  H03F3/68

CPC分类号： H03F1/0277 ,  H03F1/22 ,  H03F3/211

摘要： An input signal (Vin) is applied to a first amplifier (A1) and a second amplifier (A2) via a circuit (M), which amplifiers are both coupled to an output terminal (U) to supply an output voltage (Vuit). For this purpose the circuit (M) generates two mutually complementary signals which are related to the output signal (Vuit) and the maximum signal values corresponding to the individual output signals of the first amplifier (A1) and the second amplifier (A2). The output signal to be supplied (Vuit) consequently dictates which amplifier (A1, A2) is driven into full conduction.