公开(公告)号：US08718629B2

公开(公告)日：2014-05-06

申请号：US12309423

申请日：2007-07-18

申请人： Hiroaki Inoue ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Masato Edahiro

IPC分类号： H04B17/00 ,  H04M3/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/46

CPC分类号： H04L12/12 ,  Y02D50/40

摘要： Provided is the information communication processing device capable of executing terminal function switching control in linkage with an external communication content on one information communication processing device based on the external communication content without a problem in switching. The information communication processing device has at least one information processing device having a plurality of function environments for executing an application, and a switching control unit for switching a function environment, in which the switching control unit determines a function environment to be switched based on contents of communication with the outside of the information communication processing device and sets context of the function environment to be switched at context of a function environment being executed, thereby executing switching to the function environment to be switched.

摘要翻译： 提供了能够基于外部通信内容在一个信息通信处理装置上执行与外部通信内容相关联的终端功能切换控制的信息通信处理装置，而没有切换问题。 信息通信处理装置具有至少一个具有用于执行应用的多个功能环境的信息处理装置，以及用于切换功能环境的切换控制单元，其中切换控制单元基于内容来确定要切换的功能环境 与信息通信处理装置的外部进行通信，并且在正在执行的功能环境的上下文中设置要切换的功能环境的上下文，从而执行切换到要切换的功能环境。

公开(公告)号：US08531963B2

公开(公告)日：2013-09-10

申请号：US12663474

申请日：2008-05-30

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

IPC分类号： H04J3/14

CPC分类号： H04L63/0263 ,  G06F15/7825 ,  H04L63/0218

摘要： A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. Transmission side adaptors store first delivery information, and control delivery of the request signal to be received from the first core in accordance with the first delivery information. Reception side adaptors store second delivery information, and control delivery of the request signal to be received through the interconnecting network to the second core in accordance with the second delivery information. The first delivery information and the second delivery information are hierarchically set.

摘要翻译： 本发明的半导体集成电路包括多个核心，以及包括连接到每个核心的适配器的互连网络以及连接适配器以在它们之间通信的多个路由器。 传输侧适配器存储第一传送信息，并且根据第一传送信息控制要从第一内核接收的请求信号的传送。 接收侧适配器存储第二传送信息，并且根据第二传送信息控制要通过互连网络接收到第二核的请求信号的传送。 第一递送信息和第二递送信息被分层设置。

公开(公告)号：US20090247142A1

公开(公告)日：2009-10-01

申请号：US12309423

申请日：2007-07-18

申请人： Hiroaki Inoue ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Masato Edahiro

IPC分类号： H04M3/00 ,  G06F9/48

CPC分类号： H04L12/12 ,  Y02D50/40

摘要： Provided is the information communication processing device capable of executing terminal function switching control in linkage with an external communication content on one information communication processing device based on the external communication content without a problem in switching. The information communication processing device has at least one information processing device having a plurality of function environments for executing an application, and a switching control unit for switching a function environment, in which the switching control unit determines a function environment to be switched based on contents of communication with the outside of the information communication processing device and sets context of the function environment to be switched at context of a function environment being executed, thereby executing switching to the function environment to be switched.

摘要翻译： 提供了能够基于外部通信内容在一个信息通信处理装置上执行与外部通信内容相关联的终端功能切换控制的信息通信处理装置，而没有切换问题。 信息通信处理装置具有至少一个具有用于执行应用的多个功能环境的信息处理装置，以及用于切换功能环境的切换控制单元，其中切换控制单元基于内容来确定要切换的功能环境 与信息通信处理装置的外部进行通信，并且在正在执行的功能环境的上下文中设置要切换的功能环境的上下文，从而执行切换到要切换的功能环境。

公开(公告)号：US08412867B2

公开(公告)日：2013-04-02

申请号：US12663477

申请日：2008-05-30

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

IPC分类号： G06F13/12 ,  H04L12/56

CPC分类号： G06F15/16 ,  G06F21/50 ,  G06F21/577 ,  H04L29/06

摘要： A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. The adaptors keep delivery information indicating a delivery condition of a request signal received from the cores and control delivery of the request signal received from the cores in accordance with the delivery information.

摘要翻译： 本发明的半导体集成电路包括多个核心，以及包括连接到每个核心的适配器的互连网络以及连接适配器以在它们之间通信的多个路由器。 适配器保持指示从核心接收到的请求信号的传送条件的传送信息，并且根据传送信息控制从核心接收的请求信号的传送。

公开(公告)号：US09553604B2

公开(公告)日：2017-01-24

申请号：US13262181

申请日：2010-03-19

申请人： Hiroaki Inoue

发明人： Hiroaki Inoue

IPC分类号： H03M7/30 ,  G11C7/10 ,  H04L29/12 ,  G11C29/00

CPC分类号： H03M7/30 ,  G11C7/103 ,  G11C29/003 ,  H04L29/12311

摘要： In order to improve the compression rate for configuration information including address information and data information when transmitting or storing configuration information which includes addresses and data having differing characteristics, an information compression device is provided with a compressor which receives as input and compresses the configuration information provided with the addresses and data, and a compressed information storage module for storing the configuration information which is compressed, that is, compressed configuration information, as the information to be decompressed for the user, said compressor including an information separating module for separating the configuration information into address information and data information, an address compressor and data compressor which separately compress the separated address information and data information, and a compressed information outputting module for combining the compressed address information and data information and outputting the result as compressed configuration information.

摘要翻译： 为了在发送或存储具有不同特征的地址和数据的配置信息的情况下提高包括地址信息和数据信息的配置信息的压缩率，信息压缩装置设置有作为输入接收并压缩提供的配置信息的压缩器 具有地址和数据的压缩信息存储模块，以及用于将被压缩的配置信息（即，压缩配置信息）存储为要为用户解压缩的信息的压缩信息存储模块，所述压缩器包括用于分离配置信息的信息分离模块 地址信息和数据信息，分离地压缩分离的地址信息和数据信息的地址压缩器和数据压缩器，以及压缩信息输出模块，用于将压缩的地址信息和数据 信息并将结果作为压缩配置信息输出。

公开(公告)号：US09164905B2

公开(公告)日：2015-10-20

申请号：US13393814

申请日：2010-08-18

申请人： Hiroaki Inoue

发明人： Hiroaki Inoue

IPC分类号： G06F12/00 ,  G06F12/08

CPC分类号： G06F12/0802 ,  G06F2212/1028 ,  Y02D10/13

摘要： There are provided a semiconductor integrated circuit device, a method of controlling a semiconductor integrated circuit device, and a cache device capable of efficiently implementing power saving, wherein the cache device includes a low-voltage operation enabling cache (200), and a small-area cache (300) having a type different from that of the cache (200), the cache (200) and the cache (300) being independently supplied with source voltage; the cache (200) being operable at a voltage lower than the lower limit voltage at which the cache (300) is operable; a cache control unit (400) operating switchable controls between a first mode allowing only the cache (200) to operate, and a second mode allowing the cache (200) or the cache (300) to operate; and the cache (200) in the first mode operating to supply a voltage below the lower limit voltage at which the cache (300) is operable, while interrupting power supply to the cache (300).

摘要翻译： 提供了一种半导体集成电路器件，一种半导体集成电路器件的控制方法和能够有效地实现功率节省的高速缓存器件，其中该高速缓存器件包括一个使能高速缓存（200）的低压工作， 区域缓存（300）具有与高速缓存（200）不同的类型，高速缓存（200）和高速缓存（300）被独立地提供源电压; 高速缓存（200）可操作在低于高速缓存（300）可操作的下限电压的电压; 高速缓存控制单元（400）在允许仅高速缓存（200）操作的第一模式和允许高速缓存（200）或高速缓存（300）操作的第二模式之间操作可切换控制; 以及在所述第一模式下的所述高速缓存（200）工作以提供低于所述高速缓存（300）可操作的所述下限电压的电压，同时中断向所述高速缓存（300）的电力供应。

公开(公告)号：US09160361B2

公开(公告)日：2015-10-13

申请号：US13379271

申请日：2010-06-01

申请人： Hiroaki Inoue

发明人： Hiroaki Inoue

IPC分类号： H03M7/30

CPC分类号： H03M7/30 ,  H03M7/3086 ,  H03M7/6023

摘要： To provide a data compression method that can achieve a high data compression ratio and does not require a buffer circuit or only requires a buffer circuit having a small storage capacity at a receiving side. A data compressor device has an adjustment and compression tool operable to switch a plurality of code words having different code lengths and compress input data at a rate that does not exceed a predetermined receiving speed.

摘要翻译： 为了提供可以实现高数据压缩比并且不需要缓冲电路或仅需要在接收侧具有小存储容量的缓冲电路的数据压缩方法。 数据压缩装置具有可操作以切换具有不同代码长度的多个代码字的调整和压缩工具，并以不超过预定接收速度的速率压缩输入数据。

公开(公告)号：US09109344B2

公开(公告)日：2015-08-18

申请号：US13321599

申请日：2010-05-19

申请人： Kouya Iizuka ,  Satoru Nishimura ,  Hiroshi Yoshida ,  Hiroaki Inoue

发明人： Kouya Iizuka ,  Satoru Nishimura ,  Hiroshi Yoshida ,  Hiroaki Inoue

IPC分类号： E02F9/22 ,  E02F9/20 ,  F15B11/17

CPC分类号： E02F9/2004 ,  E02F9/2228 ,  E02F9/2282 ,  E02F9/2285 ,  E02F9/2292 ,  F15B11/17 ,  F15B2211/324 ,  F15B2211/526

摘要： In the working machine, first and second pilot flow paths are directly or indirectly connected to a tank flow path (52). A first restrictor is disposed between the first pilot flow path and the tank flow path. A second restrictor is disposed between the second pilot flow path and the tank flow path. An actuator control unit is configured to control an actuator based on a hydraulic pressure detected by a first hydraulic pressure detector unit and that detected by a second hydraulic pressure detector unit sensor.

摘要翻译： 在工作机器中，第一和第二先导流动路径直接或间接地连接到罐流动路径（52）。 第一限流器设置在第一先导流路和箱流路之间。 第二限流器设置在第二先导流路和罐流路之间。 执行器控制单元被配置为基于由第一液压检测器单元检测到的液压并且由第二液压检测器单元传感器检测到的液压来控制致动器。

公开(公告)号：US20130022790A1

公开(公告)日：2013-01-24

申请号：US13609703

申请日：2012-09-11

申请人： Hiroaki Inoue ,  Tadashi Nakatani ,  Satoshi Ueda

发明人： Hiroaki Inoue ,  Tadashi Nakatani ,  Satoshi Ueda

IPC分类号： B32B3/30

CPC分类号： H01H59/0009 ,  Y10T428/24521 ,  Y10T428/24562

摘要： A method for manufacturing a MEMS device, includes: preparing a substrate provided with a first substrate in which a cavity is formed, and a second substrate that is bonded to a side of the first substrate and includes a slit to delimit a movable portion in a position corresponding to the cavity, the second substrate, including a first surface thereof facing the first substrate, being provided with a thermally-oxidized film selectively formed on the first surface in a position corresponding to the movable portion; forming a first electrode layer on a second surface opposite to the first surface; forming a sacrifice lager on the first electrode layer and the second substrate; forming a second electrode layer on the sacrifice layer; and removing the sacrifice layer and the thermally-oxidized film after the second electrode layer is formed.

摘要翻译： 一种MEMS器件的制造方法，其特征在于，包括：准备具有形成有空腔的第一基板的基板和与所述第一基板的一侧接合的第二基板，所述第二基板包括用于限定所述第一基板的可动部的狭缝 包括与第一基板相对的第一表面的第二基板设置有在与第一基板相对应的位置上选择性地形成在第一表面上的热氧化膜; 在与所述第一表面相对的第二表面上形成第一电极层; 在所述第一电极层和所述第二基板上形成牺牲物; 在牺牲层上形成第二电极层; 并且在形成第二电极层之后去除牺牲层和热氧化膜。

公开(公告)号：US20120173604A1

公开(公告)日：2012-07-05

申请号：US13395725

申请日：2010-09-13

申请人： Hiroaki Inoue

发明人： Hiroaki Inoue

IPC分类号： G06F15/16

CPC分类号： G06F9/5061

摘要： A data center system, comprises a plurality of nodes, and a reconfigurable node which executes processing in response to a processing request from the plurality of nodes and which can be shared by the plurality of nodes. The reconfigurable node includes at least one server including at least one device which executes processing according to the processing request, and a control device which allocates, in response to a processing request from a calculation node and a communication node, processing corresponding to the processing request to the device of the server.

摘要翻译： 数据中心系统，包括多个节点，以及可重配置节点，其响应于来自多个节点的处理请求执行处理，并且可由多个节点共享。 可重构节点包括至少一个服务器，包括至少一个根据处理请求执行处理的设备，以及控制设备，响应于来自计算节点和通信节点的处理请求，分配与处理请求对应的处理 到服务器的设备。