公开(公告)号：US06620289B1

公开(公告)日：2003-09-16

申请号：US09300563

申请日：1999-04-27

申请人： Chun Yan ,  Yan Ye ,  Diana Xiaobing Ma

发明人： Chun Yan ,  Yan Ye ,  Diana Xiaobing Ma

IPC分类号： H01L21306

CPC分类号： C23C16/45565 ,  C23C16/455 ,  C23C16/45502 ,  H01J37/321 ,  H01J37/3244 ,  H01L21/67017 ,  H01L21/67069

摘要： A method and apparatus for processing a workpiece in a chamber by providing an asymmetric flow of process gas and processing the workpiece with the process gas. The asymmetric flow counteracts a non-uniform distribution of reactive species in the chamber. The asymmetric flow can be accomplished by introducing the process gas through a plurality of gas nozzles that communicate through a side wall of the chamber proximate a pump port while pumping gas with a pump coupled to the pump port. The inventive method can be used with a conventional processing chamber by only opening the gas nozzles closest to the pump and blocking any other gas nozzles. Alternatively, the method can be implemented in a processing chamber having gas nozzles located only proximate the pump port.

摘要翻译： 一种用于通过提供工艺气体的非对称流动并用工艺气体处理工件来处理腔室中的工件的方法和装置。 不对称流动抵消了室中反应物质的不均匀分布。 不对称流动可以通过将工艺气体引入多个气体喷嘴来实现，所述多个气体喷嘴通过邻近泵口的腔室的侧壁连通，同时用连接到泵口的泵泵送气体。 本发明的方法可以通过仅打开最靠近泵的气体喷嘴并阻挡任何其它气体喷嘴而与常规处理室一起使用。 或者，该方法可以在具有仅位于泵端口附近的气体喷嘴的处理室中实现。

公开(公告)号：US06488862B1

公开(公告)日：2002-12-03

申请号：US09428307

申请日：1999-10-27

申请人： Yan Ye ,  Diana Xiaobing Ma ,  Gerald Yin

发明人： Yan Ye ,  Diana Xiaobing Ma ,  Gerald Yin

IPC分类号： C23F100

CPC分类号： H01L21/32131 ,  C23F4/00 ,  Y10T428/12229 ,  Y10T428/12528 ,  Y10T428/12771 ,  Y10T428/12826 ,  Y10T428/12896

摘要： Copper can be pattern etched at acceptable rates and with selectivity over adjacent materials using an etch process which utilizes a solely physical process which we have termed “enhanced physical bombardment”. Enhanced physical bombardment requires an increase in ion density and/or an increase in ion energy of ionized species which strike the substrate surface. To assist in the removal of excited copper atoms from the surface being etched, the power to the ion generation source and/or the substrate offset bias source may be pulsed. In addition, when the bombarding ions are supplied from a remote source, the supply of these ions may be pulsed. Further, thermal phoresis may be used by maintaining a substrate temperature which is higher than the temperature of a surface in the etch chamber. It is also possible to use a chemically reactive species in combination with the physical ion bombardment without causing copper corrosion problems, so long as the concentration of the chemically reactive ion component is sufficiently low that the etching is carried out in a physical bombardment dominated etch regime.

摘要翻译： 铜可以以可接受的速率进行图案蚀刻，并且使用使用仅称为“增强物理轰击”的物理过程的蚀刻工艺对相邻材料具有选择性。 增强的物理轰击需要离子密度的增加和/或离子化物质的离子能量的增加，这些物质撞击到基底表面。 为了帮助从被蚀刻的表面去除激发的铜原子，离子产生源和/或衬底偏置偏置源的功率可以是脉冲的。 此外，当从远程源供应轰击离子时，这些离子的供应可以是脉冲的。 此外，可以通过保持高于蚀刻室中的表面的温度的衬底温度来使用热电泳。 只要化学反应离子组分的浓度足够低以致蚀刻在物理轰击主导的蚀刻状态下进行，也可以将化学反应物质与物理离子轰击结合使用而不引起铜腐蚀问题 。

公开(公告)号：US5968847A

公开(公告)日：1999-10-19

申请号：US42146

申请日：1998-03-13

申请人： Yan Ye ,  Diana Xiaobing Ma

发明人： Yan Ye ,  Diana Xiaobing Ma

IPC分类号： C23F4/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/00 ,  B44C1/22

CPC分类号： C23F4/00 ,  H01L21/32136 ,  H01L21/76838 ,  H01L21/7684

摘要： In the preparation of semiconductor structures having multilevel copper conductive features which must be interconnected, it is frequently desired to remove portions of a copper layer deposited over a substrate. In particular, where lines and contacts are created by depositing a copper layer to fill trenches and vias present in a dielectric layer, it is desired to remove the portion of the copper layer which does not form the desired line or contact. The present invention provides a method of etching a copper layer (film) to remove the portion of the film which is not part of the desired conductive interconnect structure, while avoiding over etching of the structure and the formation of corrosive surface contaminants on the surface of the etched copper. The method of etching is referred to as the etchback process, since, in a typical fabrication process, the deposited copper layer is etched back to the upper or "field" surface of a substrate containing trenches and vias which are filled by the copper. The copper layer etchback may be conducted on a substrate surface using a low temperature regime, below about 150.degree. C. Within this low temperature regime, the etchback is preferably conducted using essentially physical bombardment of the copper surface. Or, the etchback may be carried out with the substrate surface at a temperature which falls within a high temperature regime, above about 150.degree. C. Within this high temperature regime, three different etch chemistries may be used. The etch plasma may be formed solely from non-reactive gases; the etch plasma may be formed solely from gases which are produce a reactive species (such as a gas which is a source of chlorine or fluorine), or, the etch plasma may be formed from a combination of non-reactive and reactive gases which are tailored to adjust selectivity and etch rate. When the gas is a source of chlorine or fluorine, it is preferred that the gas be a compound comprising at least one other element in combination with chlorine or fluorine.

公开(公告)号：US06372633B1

公开(公告)日：2002-04-16

申请号：US09111657

申请日：1998-07-08

申请人： Dan Maydan ,  Ashok K. Sinha ,  Zheng Xu ,  Liang-Yu Chen ,  Roderick Craig Mosely ,  Daniel Carl ,  Diana Xiaobing Ma ,  Yan Ye ,  Wen Chiang Tu

发明人： Dan Maydan ,  Ashok K. Sinha ,  Zheng Xu ,  Liang-Yu Chen ,  Roderick Craig Mosely ,  Daniel Carl ,  Diana Xiaobing Ma ,  Yan Ye ,  Wen Chiang Tu

IPC分类号： H01L214763

CPC分类号： H01L21/76838 ,  H01L21/32136 ,  H01L21/76885

摘要： The present invention provides a method and apparatus for forming reliable interconnects in which the overlap of the line over the plug or via is minimized or eliminated. In one aspect, a barrier plug comprised of a conductive material, such as tungsten, is deposited over the via to provide an etch stop during line etching and to prevent diffusion of the metal, such as copper, into the surrounding dielectric material if the line is misaligned over the via. Additionally, the barrier plug prevents an overall reduction in resistance of the interconnect and enables reactive ion etching to be employed to form the metal line. In another aspect, reactive ion etching techniques are employed to selectively etch the metal line and the barrier layer to provide a controlled etching process which exhibits selectivity for the metal line, then the barrier and then the via or plug.

摘要翻译： 本发明提供了一种用于形成可靠互连的方法和装置，其中使插塞或通孔上的线重叠最小化或消除。 在一个方面，由诸如钨的导电材料构成的阻挡塞沉积在通孔上，以在线蚀刻期间提供蚀刻停止并且防止金属（例如铜）扩散到周围的介电材料中，如果线 在通道上不对齐。 此外，阻挡塞防止互连的电阻的总体降低，并且能够使用反应离子蚀刻来形成金属线。 在另一方面，使用反应离子蚀刻技术来选择性地蚀刻金属线和阻挡层，以提供对金属线，然后是屏障，然后是通孔或插塞的选择性的受控蚀刻工艺。

公开(公告)号：US06635577B1

公开(公告)日：2003-10-21

申请号：US09280462

申请日：1999-03-30

申请人： John M. Yamartino ,  Peter K. Loewengardt ,  Kenlin Huang ,  Diana Xiaobing Ma

发明人： John M. Yamartino ,  Peter K. Loewengardt ,  Kenlin Huang ,  Diana Xiaobing Ma

IPC分类号： H01L21302

CPC分类号： H01J37/32339 ,  H01L21/32136

摘要： A method of eliminating charging resulting from plasma processing a semiconductor wafer comprising the steps of plasma processing the semiconductor wafer in a manner that may result in topographically dependent charging and exposing, during at least a portion of a time in which the semiconductor wafer is being plasma processed, the semiconductor wafer to particles that remove charge from the semiconductor wafer and reduce topographically dependent charging.

摘要翻译： 一种消除由等离子体处理半导体晶片产生的电荷的方法，其包括以下步骤：在半导体晶片为等离子体的至少一部分时间内以可能导致形貌上依赖性的充电和曝光的方式等离子体处理半导体晶片 将半导体晶片加工成从半导体晶片去除电荷的颗粒，并减少与地形相关的充电。

公开(公告)号：US08317987B2

公开(公告)日：2012-11-27

申请号：US12889219

申请日：2010-09-23

申请人： Emmanuel Chua Abas ,  Chen-An Chen ,  Diana Xiaobing Ma ,  Kalyana Bhargava Ganti

发明人： Emmanuel Chua Abas ,  Chen-An Chen ,  Diana Xiaobing Ma ,  Kalyana Bhargava Ganti

IPC分类号： C25B9/02

CPC分类号： C25D17/08 ,  C25D17/001 ,  C25D17/005 ,  C25D17/007 ,  C25D17/10 ,  Y10T156/10 ,  Y10T156/1057

摘要： One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The substrate carrier comprises a non-conductive carrier body on which the substrates are to be held. Electrically-conductive lines are embedded within the carrier body, and a plurality of contact clips are coupled to the electrically-conductive lines embedded within the carrier body. The contact clips hold the substrates in place and electrically couple the substrates to the electrically-conductive lines. The non-conductive carrier body is continuous so as to be impermeable to flow of electroplating solution through the non-conductive carrier body. Other embodiments, aspects and features are also disclosed.

摘要翻译： 一个实施例涉及用于电镀多个基板的基板载体。 衬底载体包括其上将保持衬底的非导电载体。 导电线嵌入载体主体内，并且多个接触夹被耦合到嵌入载体主体内的导电线。 接触夹将基板固定在适当位置，并将基板电耦合到导电线。 非导电载体主体是连续的，以便不可渗透通过非导电载体的电镀溶液流动。 还公开了其它实施例，方面和特征。

公开(公告)号：US08221601B2

公开(公告)日：2012-07-17

申请号：US12889232

申请日：2010-09-23

申请人： Chen-An Chen ,  Emmanuel Chua Abas ,  Edmundo Anida Divino ,  Jake Randal G. Ermita ,  Jose Francisco S. Capulong ,  Arnold Villamor Castillo ,  Diana Xiaobing Ma

发明人： Chen-An Chen ,  Emmanuel Chua Abas ,  Edmundo Anida Divino ,  Jake Randal G. Ermita ,  Jose Francisco S. Capulong ,  Arnold Villamor Castillo ,  Diana Xiaobing Ma

IPC分类号： C25D17/08 ,  C25D17/06 ,  C25B9/02 ,  C25B9/04

CPC分类号： C25D17/005 ,  C25D17/001 ,  C25D17/004 ,  C25D17/08 ,  C25D17/10 ,  H05K3/0097 ,  H05K2203/0169 ,  H05K2203/0723

摘要： One embodiment relates to a substrate carrier for use in electroplating a plurality of substrates. The carrier includes a non-conductive carrier body on which the substrates are placed and conductive lines embedded within the carrier body. A plurality of conductive clip attachment parts are attached in a permanent manner to the conductive lines embedded within the carrier body. A plurality of contact clips are attached in a removable manner to the clip attachment parts. The contact clips hold the substrates in place and conductively connecting the substrates with the conductive lines. Other embodiments, aspects and features are also disclosed.

公开(公告)号：US06829056B1

公开(公告)日：2004-12-07

申请号：US10646943

申请日：2003-08-21

申请人： Michael Barnes ,  John Holland ,  Hongqing Shan ,  Bryan Y. Pu ,  Mohit Jain ,  Zhifeng Sui ,  Michael D. Armacost ,  Neil E. Hanson ,  Diana Xiaobing Ma ,  Ashok K. Sinha ,  Dan Maydan

发明人： Michael Barnes ,  John Holland ,  Hongqing Shan ,  Bryan Y. Pu ,  Mohit Jain ,  Zhifeng Sui ,  Michael D. Armacost ,  Neil E. Hanson ,  Diana Xiaobing Ma ,  Ashok K. Sinha ,  Dan Maydan

IPC分类号： G01B1114

CPC分类号： H01L21/67253 ,  H01J37/32935 ,  H01L21/67069

摘要： A substrate processing apparatus has a chamber having a substrate support, gas distributor, gas energizer, and gas exhaust port. A process monitor is provided to monitor features in a first region of the substrate and generate a corresponding first signal, and to monitor features in a second region of the substrate and generate a second signal. A chamber controller receives and evaluates the first and second signals, and operates the chamber in relation to the signals. For example, the chamber controller can select a process recipe depending upon the signal values. The chamber controller can also set a process parameter at a first level in a first processing sector and at a second level in a second processing sector. The apparatus provides a closed control loop to independently monitor and control processing of features at different regions of the substrate.

摘要翻译： 基板处理装置具有具有基板支撑件，气体分配器，气体激励器和排气口的腔室。 提供过程监视器以​​监测衬底的第一区域中的特征并产生相应的第一信号，并且监测衬底的第二区域中的特征并产生第二信号。 室控制器接收并评估第一和第二信号，并相对于信号操作室。 例如，腔室控​​制器可以根据信号值选择工艺配方。 腔室控制器还可以在第一处理扇区中将处理参数设置在第一电平处，并在第二处理扇区中将第二电平设置为第二电平。 该装置提供一个闭合的控制回路以独立地监测和控制基板的不同区域处的特征的处理。

公开(公告)号：US06547977B1

公开(公告)日：2003-04-15

申请号：US09610915

申请日：2000-07-05

申请人： Chun Yan ,  Gary C. Hsueh ,  Yan Ye ,  Diana Xiaobing Ma

发明人： Chun Yan ,  Gary C. Hsueh ,  Yan Ye ,  Diana Xiaobing Ma

IPC分类号： C03C1500

CPC分类号： H01L21/31138

摘要： The present disclosure pertains to a method for plasma etching of low k materials, particularly polymeric-based low k materials. Preferably the polymeric-based materials are organic-based materials. The method employs an etchant plasma where the major etchant species are generated from a halogen other than fluorine and oxygen. The preferred halogen is chlorine. The volumetric (flow rate) ratio of the halogen:oxygen in the plasma source gas ranges from about 1:20 to about 20:1. The atomic ratio of the halogen:oxygen preferably falls within the range from about 1:20 to about 20:1. When the halogen is chlorine, the preferred atomic ratio of chlorine:oxygen ranges from about 1:10 to about 5:1. When this atomic ratio of chlorine:oxygen is used, the etch selectivity for the low k material over adjacent oxygen-comprising or nitrogen-comprising layers is advantageous, typically in excess of about 10:1. The plasma source gas may contain additives in an amount of 15% or less by volume which are designed to improve selectivity for the low k dielectric over an adjacent material, to provide a better etch profile, or to provide better critical dimension control, for example. When the additive contains fluorine, the amount of the additive is such that residual chlorine on the etched surface of the low k material comprises less than 5 atomic %.

摘要翻译： 本公开涉及用于等离子体蚀刻低k材料，特别是基于聚合物的低k材料的方法。 优选地，基于聚合物的材料是有机基材料。 该方法采用蚀刻剂等离子体，其中主要蚀刻剂物质由除氟和氧之外的卤素产生。 优选的卤素是氯。 等离子体源气体中的卤素：氧的体积（流速）比为约1:20至约20:1。 卤素：氧的原子比优选在约1:20至约20:1的范围内。 当卤素为氯时，氯：氧的优选原子比范围为约1:10至约5:1。 当使用氯原子的氧原子比时，低k材料在相邻的含氧或含氮层上的蚀刻选择性是有利的，通常超过约10:1。 等离子体源气体可以含有体积的15％或更少的添加剂，其被设计成提高相邻材料上的低k电介质的选择性，以提供更好的蚀刻轮廓，或提供更好的临界尺寸控制，例如 。 当添加剂含氟时，添加剂的量使得低k材料的蚀刻表面上的残留氯含量小于5原子％。

公开(公告)号：US6153530A

公开(公告)日：2000-11-28

申请号：US270286

申请日：1999-03-16

申请人： Yan Ye ,  Xiaoye Zhao ,  Chang-Lin Hsieh ,  Xian-Can Deng ,  Wen-Chiang Tu ,  Chung-Fu Chu ,  Diana Xiaobing Ma

发明人： Yan Ye ,  Xiaoye Zhao ,  Chang-Lin Hsieh ,  Xian-Can Deng ,  Wen-Chiang Tu ,  Chung-Fu Chu ,  Diana Xiaobing Ma

IPC分类号： H01L21/302 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/3213 ,  H01L23/52 ,  H01L21/00

CPC分类号： H01L21/02071

摘要： Disclosed herein is a post-etch treatment for plasma etched metal-comprising features in semiconductor devices. The post-etch treatment significantly reduces or eliminates surface corrosion of the etched metal-comprising feature. It is particularly important to prevent the formation of moisture on the surface of the feature surface prior to an affirmative treatment to remove corrosion-causing contaminants from the feature surface. Avoidance of moisture formation is assisted by use of a high vacuum; use of an inert, moisture-free purge gas; and by maintaining the substrate at a sufficiently high temperature to volatilize moisture. The affirmative post-etch treatment utilizes a plasma to expose the etched metal-comprising feature to sufficient hydrogen which is in a kinetic state permitting reaction with residual halogen-comprising residues on the etched surface, while maintaining the etched feature surface at a temperature which supports volatilization of the byproducts of a reaction between the active hydrogen species and the halogen-comprising residues. For an etched copper surface, if moisture forms on the etched surface prior to an affirmative treatment to remove corrosion-causing contaminants, it is very important to avoid contact of the etched surface with pollutants which are capable of forming copper carbonates and/or copper sulfates.

摘要翻译： 本文公开了用于半导体器件中等离子体蚀刻金属的特征的后蚀刻处理。 蚀刻后处理显着地减少或消除了蚀刻的金属包含特征的表面腐蚀。 特别重要的是在肯定处理之前防止在特征表面的表面上形成湿气以从特征表面除去腐蚀性污染物。 通过使用高真空来辅助避免水分形成; 使用惰性，无湿气的吹扫气体; 并且通过将基底保持在足够高的温度以使水分挥发。 肯定的后蚀刻处理利用等离子体将含蚀刻金属的特征暴露于足够的氢气，该氢气处于动态状态，允许与蚀刻表面上的残留的含卤素残留物反应，同时将蚀刻的特征表面保持在支持 活性氢物质与含卤素残基之间的反应的副产物挥发。 对于蚀刻的铜表面，如果在进行肯定处理以除去腐蚀性污染物之前在蚀刻表面上形成水分，则避免蚀刻表面与能够形成碳酸铜和/或硫酸铜的污染物接触是非常重要的 。