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公开(公告)号：US06573577B1
公开(公告)日：2003-06-03
申请号：US09496944
申请日：2000-02-03
IPC分类号： H01L2976
CPC分类号： H01L27/0928 , H01L21/82385 , H01L21/823892
摘要： A semiconductor device of the present invention includes: a semiconductor substrate; a deep well region of a first conductivity type, formed in the semiconductor substrate; a plurality of shallow well regions of a second conductivity type, formed in the deep well region; a source region and a drain region of the first conductivity type, respectively formed in the plurality of shallow well regions; a channel region formed between the source region and the drain region; a gate insulating film formed on the channel region; and a gate electrode formed on the gate insulating film, wherein the gate electrode is electrically connected to a corresponding one of the shallow well regions, and the shallow well region is electrically separated from the adjacent shallow well region.
摘要翻译： 本发明的半导体器件包括：半导体衬底; 形成在半导体衬底中的第一导电类型的深阱区; 形成在深井区域中的多个第二导电类型的浅阱区; 分别形成在所述多个浅井区域中的所述第一导电类型的源极区域和漏极区域; 在所述源极区域和所述漏极区域之间形成的沟道区域; 形成在沟道区上的栅极绝缘膜; 以及形成在所述栅极绝缘膜上的栅电极，其中所述栅电极与相应的一个浅阱区域电连接，并且所述浅阱区域与相邻的浅阱区域电分离。
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公开(公告)号：US06288429B1
公开(公告)日：2001-09-11
申请号：US09319517
申请日：1999-07-07
IPC分类号： H01L2976
CPC分类号： H01L29/1087 , H01L27/092 , H01L29/7832
摘要： A semiconductor device which materializes dynamic threshold operation, on the assumption of the application of a bulk semiconductor substrate. The semiconductor substrate has a first conductivity type well region (11), a source region (12) and a drain region (13) of second conductivity type are made in the vicinity of the surface of the first conductivity type of well region (11), a channel region (14) is provided between these regions (12 and 13), a gate insulating film (15) and a gate electrode (16) are stacked in order on the channel region (14), and the gate electrode (16) is connected to the well region (11) through the contact hole (not shown in the figure) of the gate insulating film (15). In this transistor, as compared with a conventional SOI substrate, the resistance of the well region (11) can be lowered to about one-tenth.
摘要翻译： 在假设应用体半导体衬底的情况下实现动态阈值操作的半导体器件。 半导体衬底具有第一导电类型阱区（11），在第一导电类型的阱区（11）的表面附近形成第二导电类型的源区（12）和漏区（13） 在这些区域（12,13）之间设置沟道区域（14），栅极绝缘膜（15）和栅极电极（16）依次层叠在沟道区域（14）上，栅电极（16） ）通过栅极绝缘膜（15）的接触孔（图中未示出）连接到阱区（11）。 在该晶体管中，与传统的SOI衬底相比，阱区（11）的电阻可以降低到约十分之一。
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23.发明授权Semiconductor device having junction depths for reducing short channel effect 有权具有用于降低短沟道效应的结深度的半导体器件公开(公告)号：US06255702B1
公开(公告)日：2001-07-03
申请号：US09274973
申请日：1999-03-23
IPC分类号： H01L2978
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665 , Y10S257/90
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译： 公开了一种半导体器件及其制造方法。 在硅半导体衬底上形成氮化硅膜。 然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。 硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。 制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。
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公开(公告)号：US07135386B2
公开(公告)日：2006-11-14
申请号：US10394024
申请日：2003-03-24
申请人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
发明人： Kotaro Kataoka , Hiroshi Iwata , Masayuki Nakano
IPC分类号： H01L21/322
CPC分类号： H01L21/02043 , H01L21/28052 , H01L21/28512 , H01L21/28518 , H01L21/76897 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L2924/0002 , H01L2924/00
摘要： By removing halogen atoms existing on the surface of the silicon layer and in the subsurface thereof so that the concentration of halogen atoms becomes 100 ppm or lower and forming an electrode on the resulting silicon layer, the electrode which has a low resistance can be produced, and a highly reliable semiconductor device can be produces as well.
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25.发明申请公开(公告)号：US20060197142A1
公开(公告)日：2006-09-07
申请号：US11366479
申请日：2006-03-03
申请人： Hiroshi Iwata , Akihide Shibata , Masayuki Nakano
发明人： Hiroshi Iwata , Akihide Shibata , Masayuki Nakano
IPC分类号： H01L29/788
CPC分类号： G11C16/0475 , H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/513 , H01L29/792 , H01L29/7923
摘要： A semiconductor storage device has a semiconductor layer having a first conductivity type region and two second conductivity type regions separated from each other by the first conductivity type region, a memory function body formed on a surface of the semiconductor layer, and a gate electrode. The memory function body has a charge storage insulator and a charge retention insulator positioned between the charge storage insulator and the semiconductor layer, and doubles as a gate insulating film. The charge retention insulator contains such impurity atoms (phosphorus) as would cause an intrinsic semiconductor to be of the second conductivity type.
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26.发明申请Semiconductor storage device, manufacturing method therefor and portable electronic equipment 有权半导体存储装置及其制造方法及便携式电子设备公开(公告)号：US20050280065A1
公开(公告)日：2005-12-22
申请号：US11142770
申请日：2005-06-02
IPC分类号： G11C16/04 , H01L21/28 , H01L21/336 , H01L21/84 , H01L27/108 , H01L27/12 , H01L29/792
CPC分类号： H01L29/6684 , G11C16/0475 , H01L21/28273 , H01L21/28282 , H01L21/28291 , H01L21/84 , H01L27/1203 , H01L29/66825 , H01L29/66833 , H01L29/7923
摘要： A semiconductor storage device has a single gate electrode formed on a semiconductor substrate through a gate insulation film. First and second memory function bodies formed on both sides of the gate electrode. A P-type channel region is formed in a surface of the substrate on the side of the gate electrode. N-type first and second diffusion regions are formed on both sides of the channel region. The channel region is composed of an offset region located under the first and second memory function bodies and a gate electrode beneath region located under the gate electrode. The concentration of a dopant which imparts a P-type conductivity to the offset region is effectively lower than the concentration of a dopant which imparts the P-type conductivity to the gate electrode beneath region. This makes it possible to provide the semiconductor storage device which is easily shrunk in scale.
摘要翻译： 半导体存储器件具有通过栅极绝缘膜形成在半导体衬底上的单个栅电极。 形成在栅电极两侧的第一和第二记忆功能体。 在栅极侧的基板的表面形成P型沟道区。 在沟道区域的两侧形成N型第一和第二扩散区域。 沟道区域由位于第一和第二存储器功能体之下的偏移区域和位于栅电极下方的栅极电极构成。 赋予偏移区域的P型导电性的掺杂剂的浓度有效地低于向区域下方的栅电极施加P型导电性的掺杂剂的浓度。 这使得可以提供容易缩小的半导体存储装置。
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公开(公告)号：US06927463B2
公开(公告)日：2005-08-09
申请号：US10439540
申请日：2003-05-15
IPC分类号： H01L21/76 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L29/772 , H01L29/76
CPC分类号： H01L27/0928 , H01L21/82385 , H01L21/823892
摘要： A semiconductor device of the present invention includes: a semiconductor substrate; a deep well region of a first conductivity type, formed in the semiconductor substrate; a plurality of shallow well regions of a second conductivity type, formed in the deep well region; a source region and a drain region of the first conductivity type, respectively formed in the plurality of shallow well regions; a channel region formed between the source region and the drain region; a gate insulating film formed on the channel region; and a gate electrode formed on the gate insulating film, wherein the gate electrode is electrically connected to a corresponding one of the shallow well regions, and the shallow well region is electrically separated from the adjacent shallow well region.
摘要翻译： 本发明的半导体器件包括：半导体衬底; 形成在半导体衬底中的第一导电类型的深阱区; 形成在深井区域中的多个第二导电类型的浅阱区; 分别形成在所述多个浅井区域中的所述第一导电类型的源极区域和漏极区域; 在所述源极区域和所述漏极区域之间形成的沟道区域; 形成在沟道区上的栅极绝缘膜; 以及形成在所述栅极绝缘膜上的栅电极，其中所述栅电极与相应的一个浅阱区电连接，并且所述浅阱区与相邻的浅阱区电分离。
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28.发明授权Semiconductor device having junction depths for reducing short channel effect 失效具有用于降低短沟道效应的结深度的半导体器件公开(公告)号：US06720627B1
公开(公告)日：2004-04-13
申请号：US09698097
申请日：2000-10-30
IPC分类号： H01L31113
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译： 公开了一种半导体器件及其制造方法。 在硅半导体衬底上形成氮化硅膜。 然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。 硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。 制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。
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公开(公告)号：US06255704B1
公开(公告)日：2001-07-03
申请号：US08881697
申请日：1997-06-24
IPC分类号： H01L2976
CPC分类号： H01L27/0928 , H01L21/82385 , H01L21/823892
摘要： A semiconductor device of the present invention includes: a semiconductor substrate; a deep well region of a first conductivity type, formed in the semiconductor substrate; a plurality of shallow well regions of a second conductivity type, formed in the deep well region; a source region and a drain region of the first conductivity type, respectively formed in the plurality of shallow well regions; a channel region formed between the source region and the drain region; a gate insulating film formed on the channel region; and a gate electrode formed on the gate insulating film, wherein the gate electrode is electrically connected to a corresponding one of the shallow well regions, and the shallow well region is electrically separated from the adjacent shallow well region.
摘要翻译： 本发明的半导体器件包括：半导体衬底; 形成在半导体衬底中的第一导电类型的深阱区; 形成在深井区域中的多个第二导电类型的浅阱区; 分别形成在所述多个浅井区域中的所述第一导电类型的源极区域和漏极区域; 在所述源极区域和所述漏极区域之间形成的沟道区域; 形成在沟道区上的栅极绝缘膜; 以及形成在所述栅极绝缘膜上的栅电极，其中所述栅电极与相应的一个浅阱区域电连接，并且所述浅阱区域与相邻的浅阱区域电分离。
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公开(公告)号：US08854608B2
公开(公告)日：2014-10-07
申请号：US13059821
申请日：2009-08-20
申请人： Seiichi Onoda , Keiichi Inoue , Masayuki Nakano
发明人： Seiichi Onoda , Keiichi Inoue , Masayuki Nakano
摘要： An optical fiber sensing system carries out accurate measurements while avoiding measurement noise factors. For example, effects of the emission power of a light source, fiber insertion loss, fluctuations in the sensitivity of a photo detector, fluctuations in the amplitude of an amplifier, the loss of optical energy due to bending of an optical fiber, the loss of optical energy due to connecting two or more optical fibers, and gain fluctuations of electric circuitry provided on a platform do not affect measurements. A reflective sensor is connected to an end of an optical fiber connected to a light source. The light source outputs physical measurement light and reflected light coming from the reflective sensor is separated into two beams of light. Information on the physical quantity of a measurement target object is detected on the basis of an intensity ratio of the two beams.
摘要翻译： 光纤传感系统执行准确的测量，同时避免测量噪声因素。 例如，光源的发射功率的影响，光纤插入损耗，光电检测器的灵敏度的波动，放大器的振幅的波动，光纤弯曲导致的光能的损失， 由于连接两根或多根光纤而导致的光能以及平台上提供的电路的增益波动不影响测量。 反射传感器连接到连接到光源的光纤的端部。 光源输出物理测量光，并将来自反射传感器的反射光分成两束光。 基于两个光束的强度比来检测关于测量对象物体的物理量的信息。
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