公开(公告)号：US20070196974A1

公开(公告)日：2007-08-23

申请号：US11790837

申请日：2007-04-27

申请人： Takayuki Kamiya ,  Kunihiko Mitsuoka

发明人： Takayuki Kamiya ,  Kunihiko Mitsuoka

IPC分类号： H01L21/8234

CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/66272 ,  H01L29/7322

摘要： A method of manufacturing a CMOS-BJT semiconductor device comprises the steps of: forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously in a semiconductor substrate; forming a second well of a second conductivity type opposite to said first conductivity type, in the semiconductor substrate; forming a base region of the second conductivity type in the collector region; forming first and second insulated gate structure on said first and second wells, and a junction protection structure having same constituent elements as said insulated gate structures on said base region; and forming second source/drain regions of the first conductivity type in said second well, and an emitter region of the first conductivity type in the base region, simultaneously, with an emitter-base junction reaching the principal surface below said junction protection structure.

摘要翻译： 制造CMOS-BJT半导体器件的方法包括以下步骤：在半导体衬底中同时形成第一导电类型的集电极区和第一导电类型的第一阱; 在所述半导体衬底中形成与所述第一导电类型相反的第二导电类型的第二阱; 在集电区域形成第二导电类型的基极区域; 在所述第一和第二阱上形成第一和第二绝缘栅极结构，以及在所述基极区上具有与所述绝缘栅极结构相同的构成元件的结保护结构; 以及在所述第二阱中形成第一导电类型的第二源极/漏极区域，以及在所述基极区域中形成第一导电类型的发射极区域，同时发射极 - 基极结到达所述接合保护结构下方的主表面。

公开(公告)号：US20070159854A1

公开(公告)日：2007-07-12

申请号：US11649313

申请日：2007-01-04

申请人： Hideki Kokubu ,  Takayuki Kamiya

发明人： Hideki Kokubu ,  Takayuki Kamiya

IPC分类号： F21V7/04 ,  F21V21/08

CPC分类号： F21V7/04 ,  B60Q3/267 ,  B60Q3/64 ,  E05B17/10 ,  E05B85/12 ,  F21Y2115/10

摘要： It is a light emitting apparatus having a light source, and also having a light guide element into which light from the light source is guided. The light source is accommodated in an accommodating portion formed a top-surface side of the light emitting element. In the bottom surface of the light guide element, a light emitting portion is formed at a portion which is located away from places directly below the light source and directly below an optical axis of the light source and which extends from a region placed obliquely frontwardly from the light source to a region placed laterally from the light source.

摘要翻译： 它是具有光源的发光装置，并且还具有引导来自光源的光的导光元件。 光源容纳在形成发光元件的顶表面侧的容纳部分中。 在导光元件的底表面上，发光部分形成在远离光源正下方的位置并且直接位于光源的光轴的正下方的部分处，该部分从倾斜向前倾斜的区域 光源到从光源横向放置的区域。

公开(公告)号：US20050099860A1

公开(公告)日：2005-05-12

申请号：US11015030

申请日：2004-12-20

申请人： Takayuki Kamiya ,  Masayoshi Omura

发明人： Takayuki Kamiya ,  Masayoshi Omura

IPC分类号： H01L21/82 ,  H01L23/525 ,  G11C7/00

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has: a fuse having one end applied with a first voltage, and a MOS transistor having source, gate and drain and a connection point between the other end of the fuse and one of the source and drain, a second voltage lower than the first voltage applied to the other of the source and drain, wherein: the first and second voltages, characteristics of the MOS transistor and a resistance of the fuse are selected so that the fuse can be broken down when a predetermined program voltage is applied to the gate; and the resistance of the fuse is set to such a value as a voltage difference between a voltage at the connection point and the second voltage is lower than a drain voltage of the MOS transistor at which a drain current starts saturating, when the program voltage is applied to the gate.

摘要翻译： 半导体器件具有：具有施加第一电压的一端的熔丝和具有源极，栅极和漏极的MOS晶体管以及熔丝另一端与源极和漏极中的一个之间的连接点，第二电压低于 施加到源极和漏极中的另一个的第一电压，其中：选择第一和第二电压，MOS晶体管的特性和熔丝的电阻，使得当将预定的编程电压施加到 大门; 并且熔断器的电阻被设定为如下值：当连接点和第二电压之间的电压差低于漏极电流开始饱和的MOS晶体管的漏极电压时，当编程电压为 应用于门。

公开(公告)号：US20050029621A1

公开(公告)日：2005-02-10

申请号：US10935426

申请日：2004-09-08

申请人： Takayuki Kamiya ,  Masayoshi Omura

发明人： Takayuki Kamiya ,  Masayoshi Omura

IPC分类号： H01L21/82 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has: a fuse having one end applied with a first voltage, and a MOS transistor having source, gate and drain and a connection point between the other end of the fuse and one of the source and drain, a second voltage lower than the first voltage applied to the other of the source and drain, wherein: the first and second voltages, characteristics of the MOS transistor and a resistance of the fuse are selected so that the fuse can be broken down when a predetermined program voltage is applied to the gate; and the resistance of the fuse is set to such a value as a voltage difference between a voltage at the connection point and the second voltage is lower than a drain voltage of the MOS transistor at which a drain current starts saturating, when the program voltage is applied to the gate.

摘要翻译： 半导体器件具有：具有施加第一电压的一端的熔丝和具有源极，栅极和漏极的MOS晶体管以及熔丝另一端与源极和漏极中的一个之间的连接点，第二电压低于 施加到源极和漏极中的另一个的第一电压，其中：选择第一和第二电压，MOS晶体管的特性和熔丝的电阻，使得当将预定的编程电压施加到 大门; 并且熔断器的电阻被设定为如下值：当连接点和第二电压之间的电压差低于漏极电流开始饱和的MOS晶体管的漏极电压时，当编程电压为 应用于门。

公开(公告)号：US06413090B1

公开(公告)日：2002-07-02

申请号：US09276739

申请日：1999-03-26

申请人： Tsukasa Shiina ,  Minoru Katoh ,  Masayuki Oshiro ,  Takayuki Kamiya ,  Hiroshi Sakairi ,  Masami Otomo ,  Kenji Seino

发明人： Tsukasa Shiina ,  Minoru Katoh ,  Masayuki Oshiro ,  Takayuki Kamiya ,  Hiroshi Sakairi ,  Masami Otomo ,  Kenji Seino

IPC分类号： G09B900

CPC分类号： A63G31/16 ,  G09B9/14

摘要： A simulation rider transporting apparatus includes a seat having means for constraining an attitude of a rider mounted on a first base and having a second base positioned under the first base. Elevation means for elevating the first base include two cranks which are arranged opposite to each other between the first and the second base. Each of the cranks has crank arms with each crank arm having one end coupled to the second base. A crank rod is provided for coupling the other end of each crank arm to the first base. Drive means are provided for changing a relative angle between the two crank arms to a predetermined value and for holding the changed relative angle.

摘要翻译： 模拟骑车者运送装置包括具有用于约束安装在第一基座上的骑手的姿势并具有位于第一底座下方的第二底座的装置的座。 用于升高第一基座的升高装置包括在第一和第二基座之间彼此相对布置的两个曲柄。 每个曲柄具有曲柄臂，其中每个曲柄臂的一端联接到第二底座。 设置有用于将每个曲柄臂的另一端连接到第一基座的曲柄杆。 提供驱动装置，用于将两个曲柄臂之间的相对角度改变到预定值并保持改变的相对角度。

公开(公告)号：US07547948B2

公开(公告)日：2009-06-16

申请号：US11073762

申请日：2005-03-08

申请人： Takayuki Kamiya ,  Kunihiko Mitsuoka

发明人： Takayuki Kamiya ,  Kunihiko Mitsuoka

IPC分类号： H01L27/07

CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/66272 ,  H01L29/7322

摘要： A method of manufacturing a CMOS-BJT semiconductor device comprises the steps of: forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously in a semiconductor substrate; forming a second well of a second conductivity type opposite to said first conductivity type, in the semiconductor substrate; forming a base region of the second conductivity type in the collector region; forming first and second insulated gate structure on said first and second wells, and a junction protection structure having same constituent elements as said insulated gate structures on said base region; and forming second source/drain regions of the first conductivity type in said second well, and an emitter region of the first conductivity type in the base region, simultaneously, with an emitter-base junction reaching the principal surface below said junction protection structure.

摘要翻译： 制造CMOS-BJT半导体器件的方法包括以下步骤：在半导体衬底中同时形成第一导电类型的集电极区和第一导电类型的第一阱; 在所述半导体衬底中形成与所述第一导电类型相反的第二导电类型的第二阱; 在集电区域形成第二导电类型的基极区域; 在所述第一和第二阱上形成第一和第二绝缘栅极结构，以及在所述基极区上具有与所述绝缘栅极结构相同的构成元件的结保护结构; 以及在所述第二阱中形成第一导电类型的第二源极/漏极区域，以及在所述基极区域中形成第一导电类型的发射极区域，同时发射极 - 基极结到达所述接合保护结构下方的主表面。

公开(公告)号：US07419285B2

公开(公告)日：2008-09-02

申请号：US11389181

申请日：2006-03-27

申请人： Takayuki Kamiya ,  Hideki Kokubu ,  Yukiko Marui

发明人： Takayuki Kamiya ,  Hideki Kokubu ,  Yukiko Marui

IPC分类号： B60Q1/00 ,  B60Q1/26

CPC分类号： B60Q3/14 ,  B60Q3/217 ,  B60Q3/64

摘要： The invention is an indicator lamp for warning signal to a person who approaches the vehicle to steal a vehicle. The indicator lamp includes a lamp unit including a light emitting diode (LED). The indicator lamp includes a light guide including an elongated portion and a cover portion. The elongated portion receives a light from the LED at one end and conveys the light to a light emitting end. The cover portion covers the LED of the lamp unit and is integrally formed with the elongated portion. The light guide connects with the lamp unit at the cover portion. The indicator lamp prevents rainwater from the top from entering the lamp unit.

摘要翻译： 本发明是用于向靠近车辆的人员警告信号以窃取车辆的指示灯。 指示灯包括包括发光二极管（LED）的灯单元。 指示灯包括具有细长部分和盖部分的导光体。 细长部分在一端接收来自LED的光，并将光传送到发光端。 盖部分覆盖灯单元的LED并且与细长部分整体形成。 导光板与盖部分的灯具连接。 指示灯防止顶部的雨水进入灯泡单元。

公开(公告)号：US20070127216A1

公开(公告)日：2007-06-07

申请号：US11634083

申请日：2006-12-06

申请人： Takayuki Kamiya ,  Hideki Kokubu

发明人： Takayuki Kamiya ,  Hideki Kokubu

IPC分类号： H05K7/20

CPC分类号： H01R13/7175 ,  H01R13/6658 ,  H01R13/6666 ,  H01R2201/26 ,  Y10S362/80

摘要： There is provided an LED lamp unit comprising an LED lamp, a protective component for an LED lighting circuit, a circuit section and a case part, characterized in that the circuit section has a metal plate which is embedded in the case part with its surface partially exposed, a lead of the LED lamp is electrically connected to the exposed surface of the metal plate, and the protective component for the LED lighting circuit is connected to the metal plate at an opposite side to a side where the lead of the LED lamp is connected.

摘要翻译： 提供了一种LED灯单元，包括LED灯，用于LED照明电路的保护元件，电路部分和壳体部分，其特征在于，电路部分具有金属板，该金属板嵌入壳体部分中，其表面部分 LED灯的引线电连接到金属板的暴露表面，并且用于LED照明电路的保护元件与LED灯的引线侧的相反侧连接到金属板 连接的。

公开(公告)号：US20060134874A1

公开(公告)日：2006-06-22

申请号：US11304587

申请日：2005-12-16

申请人： Takayuki Kamiya

发明人： Takayuki Kamiya

IPC分类号： H01L21/336 ,  H01L21/8242

CPC分类号： H01L27/0629 ,  H01L28/40 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A gate insulating film is formed on the surface of a semiconductor substrate in an opening of a field insulating film, and thereafter a gate electrode and a capacitor lower electrode made of doped polysilicon or the like are formed on the insulating film. Pocket regions are formed by an ion implantation process using the field insulating film and gate electrode as a mask, and thereafter an insulating layer is formed by CVD or the like covering the electrodes. Extension regions are formed by an ion implantation process via the insulating layer. An offset distance between the pocket region and the associated extension region can be determined at a high precision in accordance with a thickness of the insulating layer. After side spacers are formed, high concentration source/drain regions are formed.

摘要翻译： 在场绝缘膜的开口部的半导体衬底的表面上形成栅极绝缘膜，然后在绝缘膜上形成由掺杂多晶硅等构成的栅电极和电容器下电极。 通过使用场绝缘膜和栅电极作为掩模的离子注入工艺形成袋状区域，然后通过覆盖电极的CVD等形成绝缘层。 延伸区域通过离子注入工艺经由绝缘层形成。 可以根据绝缘层的厚度以高精度确定袋区域和相关联的延伸区域之间的偏移距离。 在形成后侧间隔物之后，形成高浓度源极/漏极区域。

公开(公告)号：US20050194642A1

公开(公告)日：2005-09-08

申请号：US11073762

申请日：2005-03-08

申请人： Takayuki Kamiya ,  Kunihiko Mitsuoka

发明人： Takayuki Kamiya ,  Kunihiko Mitsuoka

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/01 ,  H01L27/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/72 ,  H01L29/732

CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/66272 ,  H01L29/7322

摘要： A method of manufacturing a CMOS-BJT semiconductor device comprises the steps of: forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously in a semiconductor substrate; forming a second well of a second conductivity type opposite to said first conductivity type, in the semiconductor substrate; forming a base region of the second conductivity type in the collector region; forming first and second insulated gate structure on said first and second wells, and a junction protection structure having same constituent elements as said insulated gate structures on said base region; and forming second source/drain regions of the first conductivity type in said second well, and an emitter region of the first conductivity type in the base region, simultaneously, with an emitter-base junction reaching the principal surface below said junction protection structure.

摘要翻译： 制造CMOS-BJT半导体器件的方法包括以下步骤：在半导体衬底中同时形成第一导电类型的集电极区和第一导电类型的第一阱; 在所述半导体衬底中形成与所述第一导电类型相反的第二导电类型的第二阱; 在集电区域形成第二导电类型的基极区域; 在所述第一和第二阱上形成第一和第二绝缘栅极结构，以及在所述基极区上具有与所述绝缘栅极结构相同的构成元件的结保护结构; 以及在所述第二阱中形成第一导电类型的第二源极/漏极区域，以及在所述基极区域中形成第一导电类型的发射极区域，同时发射极 - 基极结到达所述接合保护结构下方的主表面。