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    Methods for producing thin-film layers and microsystems having thin-film layers
    21.
    发明授权
    Methods for producing thin-film layers and microsystems having thin-film layers 有权

    公开(公告)号：US10889492B2

    公开(公告)日：2021-01-12

    申请号：US16269225

    申请日：2019-02-06

    Applicant: Infineon Technologies AG

    Inventor： Alfred Sigl ,  Wolfgang Friza ,  Stefan Geissler

    IPC: B81C1/00 ,  H04R19/00 ,  H01L21/311 ,  H01L21/677 ,  H01L23/00

    Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.

    Method for Processing a Layer Structure and Microelectromechanical Component
    22.
    发明申请
    Method for Processing a Layer Structure and Microelectromechanical Component 审中-公开

    公开(公告)号：US20200277183A1

    公开(公告)日：2020-09-03

    申请号：US16878161

    申请日：2020-05-19

    Applicant: Infineon Technologies AG

    Inventor： Andre Brockmeier ,  Wolfgang Friza ,  Daniel Maurer

    IPC: B81B7/00 ,  B81C1/00

    Abstract: In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.

    Micro-electro-mechanical system devices
    23.
    发明授权
    Micro-electro-mechanical system devices 有权
    微机电系统设备

    公开(公告)号：US09565488B2

    公开(公告)日：2017-02-07

    申请号：US14716940

    申请日：2015-05-20

    Applicant: Infineon Technologies AG

    Inventor： Wolfgang Friza ,  Alfons Dehe

    IPC: H04R1/02 ,  H04R19/00 ,  H04R19/02 ,  H04R19/04

    CPC classification number: H04R1/023 ,  H04R1/086 ,  H04R19/005 ,  H04R19/02 ,  H04R19/04 ,  H04R31/00

    Abstract: In various embodiments, a micro-electro-mechanical system device is provided. The micro-electro-mechanical system device may include a carrier, a particle filter structure coupled to the carrier, the particle filter structure comprising a grid, wherein the grid comprises a plurality of grid elements, each grid element comprising at least one through hole, and a micro-electro-mechanical system structure disposed on a side of the particle filter structure opposite the carrier. A height of the plurality of grid elements is greater than a width of the corresponding grid elements.

    Abstract translation: 在各种实施例中，提供了微机电系统装置。 微电子机械系统装置可以包括载体，耦合到载体的颗粒过滤器结构，包括网格的颗粒过滤器结构，其中网格包括多个网格元件，每个网格元件包括至少一个通孔， 以及设置在与载体相对的粒子滤波器结构的一侧的微电子机械系统结构。 多个网格元素的高度大于对应网格元素的宽度。

    Semiconductor Devices and Methods of Forming Thereof
    24.
    发明申请
    Semiconductor Devices and Methods of Forming Thereof 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20150321901A1

    公开(公告)日：2015-11-12

    申请号：US14798112

    申请日：2015-07-13

    Applicant: Infineon Technologies AG

    Inventor： Alfons Dehe ,  Carsten Ahrens ,  Stefan Barzen ,  Wolfgang Friza

    IPC: B81B3/00

    CPC classification number: B81B3/0072 ,  B81B3/001 ,  B81B3/0027 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  B81C1/00404 ,  B81C1/00984 ,  B81C2201/017 ,  B81C2201/115

    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.

    Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在具有第一表面和相对的第二表面的工件的第一表面上形成牺牲层。 在牺牲层上形成膜。 从第二表面通过工件蚀刻通孔以暴露牺牲层的表面。 牺牲层的至少一部分从第二表面移除以在膜下形成空腔。 空腔与膜对准。

    Capacitive microphone with insulated conductive plate
    30.
    发明授权
    Capacitive microphone with insulated conductive plate 有权
    带绝缘导电板的电容麦克风

    公开(公告)号：US09503823B2

    公开(公告)日：2016-11-22

    申请号：US14582223

    申请日：2014-12-24

    Applicant: Infineon Technologies AG

    Inventor： Stefan Barzen ,  Andre Brockmeier ,  Marc Fueldner ,  Stephan Pindl ,  Wolfgang Friza

    IPC: H04R9/08 ,  H04R23/00

    CPC classification number: H04R19/016

    Abstract: A capacitive microphone may include a housing, a membrane, and a first backplate, wherein a first insulating layer may be disposed on a first side of the first backplate facing the membrane and a second insulating layer may be disposed on a second side of the first backplate opposite to the first side of the first backplate. A further insulating layer may be disposed on a side wall of at least one of a plurality of perforation holes in the first backplate. Each conductive surface of the first backplate may be covered with insulating material.

    Abstract translation: 电容麦克风可以包括壳体，膜和第一背板，其中第一绝缘层可以设置在第一背板的面向膜的第一侧上，并且第二绝缘层可以设置在第一绝缘层的第二侧上 背板与第一背板的第一侧相对。 另外的绝缘层可以设置在第一背板中的多个穿孔中的至少一个的侧壁上。 第一背板的每个导电表面可以用绝缘材料覆盖。

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