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公开(公告)号:US20220310518A1
公开(公告)日:2022-09-29
申请号:US17213147
申请日:2021-03-25
Applicant: Intel Corporation
Inventor: Haobo CHEN , Xiaoying GUO , Hongxia FENG , Kristof DARMAWIKARTA , Bai NIE , Tarek A. IBRAHIM , Gang DUAN , Jeremy D. ECTON , Sheng C. LI , Leonel ARANA
IPC: H01L23/538 , H01L23/498 , H01L23/00 , H01L21/48
Abstract: Embodiments disclosed herein include a multi-die packages with an embedded bridge and a thinned surface. In an example, a multi-die interconnect structure includes a package substrate having a cavity. A bridge die is in the cavity of the package substrate, the bridge die including silicon. A dielectric material is over the package substrate, over the bridge die, and in the cavity. A plurality of conductive bond pads is on the dielectric material. The multi-die interconnect structure further includes a plurality of conductive pillars, individual ones of the plurality of conductive pillars on a corresponding one of the plurality of conductive bond pads. A solder resist material is on the dielectric material, on exposed portions of the plurality of conductive bond pads, and laterally surrounding the plurality of conductive pillars. The plurality of conductive pillars has a top surface above a top surface of the solder resist material.
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公开(公告)号:US20220102055A1
公开(公告)日:2022-03-31
申请号:US17033354
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Brandon C. MARIN , Krishna BHARATH , Haifa HARIRI , Tarek A. IBRAHIM
IPC: H01F27/28 , H01L23/498 , H01L23/64 , H01F41/04 , H01L21/48
Abstract: Embodiments disclosed herein include electronic packages with embedded inductors and methods of forming such electronic packages. In an embodiment, the electronic package comprises a package core, and a plated through hole (PTH) through a thickness of the package core. In an embodiment, the electronic package further and a magnetic shell around a perimeter of the PTH, where a height of the magnetic shell is less than the thickness of the package core. In an embodiment, the magnetic shell comprises a substantially vertical sidewall and a bottom surface that is tapered.
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23.
公开(公告)号:US20210035921A1
公开(公告)日:2021-02-04
申请号:US16526087
申请日:2019-07-30
Applicant: Intel Corporation
Inventor: Nicholas NEAL , Nicholas S. HAEHN , Sergio CHAN ARGUEDAS , Edvin CETEGEN , Jacob VEHONSKY , Steve S. CHO , Rahul JAIN , Antariksh Rao Pratap SINGH , Tarek A. IBRAHIM , Thomas HEATON
IPC: H01L23/00 , H01L23/367 , H01L23/538
Abstract: Embodiments disclosed herein include electronic packages with thermal solutions. In an embodiment, an electronic package comprises a package substrate, a first die electrically coupled to the package substrate, and an integrated heat spreader (IHS) that is thermally coupled to a surface of the first die. In an embodiment, the IHS comprises a main body having an outer perimeter, and one or more legs attached to the outer perimeter of the main body, wherein the one or more legs are supported by the package substrate. In an embodiment, the electronic package further comprises a thermal block between the package substrate and the main body of the IHS, wherein the thermal block is within the outer perimeter of the main body.
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