Millimetre wave integrated circuits with thin film transistors
    25.
    发明申请
    Millimetre wave integrated circuits with thin film transistors 审中-公开
    毫米波集成电路与薄膜晶体管

    公开(公告)号:US20150069514A1

    公开(公告)日:2015-03-12

    申请号:US13987832

    申请日:2013-09-09

    IPC分类号: H01L27/13 H01L21/84

    摘要: MMIC circuits with thin film transistors are provided without the need of grinding and etching of the substrate after the fabrication of active and passive components. Furthermore, technology for active devices based on non-toxic compound semiconductors is provided. The success in the MMIC methods and structures without substrate grinding/etching and the use of semiconductors without toxic elements for active components will reduce manufacturing time, decrease economic cost and environmental burden. MMIC structures are provided where the requirements for die or chip attachment, alignment and wire bonding are eliminated completely or minimized. This will increase the reproducibility and reduce the manufacturing time for the MMIC circuits and modules.

    摘要翻译: 提供具有薄膜晶体管的MMIC电路,而不需要在制作有源和无源部件之后对衬底进行研磨和蚀刻。 此外,还提供了基于无毒化合物半导体的有源器件技术。 无衬底研磨/蚀刻的MMIC方法和结构的成功以及无活性组分的无毒元素的半导体的使用将减少制造时间,降低经济成本和环境负担。 提供了MMIC结构,其中对芯片或芯片附接,对准和引线键合的要求被完全消除或最小化。 这将增加MMIC电路和模块的再现性并缩短制造时间。

    High electron mobility transistors with minimized performance effects of microcracks in the channel layers
    26.
    发明授权
    High electron mobility transistors with minimized performance effects of microcracks in the channel layers 有权
    高电子迁移率晶体管,通道层中微裂纹的性能影响最小

    公开(公告)号:US09048305B2

    公开(公告)日:2015-06-02

    申请号:US13998210

    申请日:2013-10-15

    IPC分类号: H01L29/66 H01L29/778

    摘要: In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.

    摘要翻译: 在基于III族氮化物外延膜或GaAs,AlGaAs和InGaAs外延膜的HEMT中,在制造和操作期间通常在沟道区域中的复合外延层中形成不期望的微裂纹。 这些微裂纹是由于材料和衬底之间的晶格失配和热膨胀系数差异引起的应变或应力引起的。 这些微裂纹将引起源极漏极阻抗的增加,并导致HEMT和包含它们的MMIC的性能和可靠性降级。 本发明通过将沟道区域长轴对准某一方向,使得沟道区域长轴与至少一种类型的微裂纹的轴线成直角,从而为HEMT提供了不需要的微裂纹的最小化效果。

    Thin film transistors and arrays
    27.
    发明申请
    Thin film transistors and arrays 有权
    薄膜晶体管和阵列

    公开(公告)号:US20100301340A1

    公开(公告)日:2010-12-02

    申请号:US12455290

    申请日:2009-06-01

    IPC分类号: H01L27/088 H01L29/786

    CPC分类号: H01L29/78609 H01L29/4908

    摘要: Thin film transistors and arrays having controlled threshold voltage and improved ION/IOFF ratio are provided in this invention. In one embodiment, a thin film transistor having a first gate insulator of high breakdown field with positive fixed charges and a second gate insulator with negative fixed charges is provided; said negative fixed charges substantially compensate said positive fixed charges in order to reduce threshold voltage and OFF state threshold voltage of said transistor. In another embodiment, a thin film transistor having a first passivation layer with negative fixed charges is provided, the negative charges reduce substantially unwanted negative charges in the adjacent active channel and hence reduce the OFF state current and increase ION/IOFF ratio, which in turn reduce the threshold voltage of the transistor.

    摘要翻译: 在本发明中提供具有受控阈值电压和改善的ION / IOFF比的薄膜晶体管和阵列。 在一个实施例中,提供具有具有正固定电荷的高击穿场的第一栅极绝缘体和具有负固定电荷的第二栅极绝缘体的薄膜晶体管; 所述负固定电荷基本上补偿所述正固定电荷,以便降低所述晶体管的阈值电压和OFF状态阈值电压。 在另一个实施例中,提供了具有负固定电荷的第一钝化层的薄膜晶体管,负电荷在相邻的有源沟道中减少了基本上不需要的负电荷,并因此降低了关闭状态电流并增加了ION / IOFF比, 降低晶体管的阈值电压。

    Metal oxynitride thin film transistors and circuits
    29.
    发明申请
    Metal oxynitride thin film transistors and circuits 有权
    金属氮氧化物薄膜晶体管和电路

    公开(公告)号:US20100301343A1

    公开(公告)日:2010-12-02

    申请号:US12455286

    申请日:2009-06-01

    IPC分类号: H01L29/786

    CPC分类号: H01L29/7869

    摘要: Thin film transistors and circuits having improved mobility and stability are disclosed in this invention to have metal oxynitrides as the active channel layers. In one embodiment, the charge carrier mobility in the thin film transistors is increased by using the metal oxynitrides as the active channel layers. In another embodiment, a thin film transistor having a p-type metal oxynitride active channel layer and a thin film transistor having an n-type metal oxynitride active channel layer are fabricated to forming a CMOS circuit. In yet another embodiment, thin film transistor circuits having metal oxynitrides as the active channel layers are provided.

    摘要翻译: 在本发明中公开了具有改善的迁移率和稳定性的薄膜晶体管和电路,以使金属氧氮化物作为有源沟道层。 在一个实施例中,通过使用金属氧氮化物作为有源沟道层来增加薄膜晶体管中的载流子迁移率。 在另一个实施例中,制造具有p型金属氧氮化物有源沟道层的薄膜晶体管和具有n型金属氮氧化物有源沟道层的薄膜晶体管,以形成CMOS电路。 在又一个实施例中,提供了具有金属氧氮化物作为有源沟道层的薄膜晶体管电路。

    High Electron Mobility Transistors with Minimized Performance Effects of Microcracks in the Channel Layers
    30.
    发明申请
    High Electron Mobility Transistors with Minimized Performance Effects of Microcracks in the Channel Layers 审中-公开
    高电子迁移率晶体管具有最小化的通道层中微裂纹的性能影响

    公开(公告)号:US20150102387A1

    公开(公告)日:2015-04-16

    申请号:US13998210

    申请日:2013-10-15

    IPC分类号: H01L29/778

    摘要: In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.

    摘要翻译: 在基于III族氮化物外延膜或GaAs,AlGaAs和InGaAs外延膜的HEMT中,在制造和操作期间通常在沟道区域中的复合外延层中形成不期望的微裂纹。 这些微裂纹是由于材料和衬底之间的晶格失配和热膨胀系数差异引起的应变或应力引起的。 这些微裂纹将引起源极漏极阻抗的增加,并导致HEMT和包含它们的MMIC的性能和可靠性降级。 本发明通过将沟道区域长轴对准某一方向,使得沟道区域长轴与至少一种类型的微裂纹的轴线成直角,从而为HEMT提供了不需要的微裂纹的最小化效果。