公开(公告)号：US07432575B2

公开(公告)日：2008-10-07

申请号：US10864099

申请日：2004-06-08

申请人： Neeraj Anil Pendse ,  Jia Liu ,  Jitendra Mohan ,  Bruce Carlton Roberts ,  Luu Thanh Nguyen ,  William Paul Mazotti

发明人： Neeraj Anil Pendse ,  Jia Liu ,  Jitendra Mohan ,  Bruce Carlton Roberts ,  Luu Thanh Nguyen ,  William Paul Mazotti

IPC分类号： H01L31/0203

CPC分类号： H05K1/0219 ,  G02B6/4201 ,  H01L23/49838 ,  H01L25/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/189 ,  H05K3/403 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/10121 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05644

摘要： A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.

摘要翻译： 描述了高性能和小规模的电路基板。 电路基板包括介电层，附接到电介质层的底表面的返回平面以及附着到电介质层顶表面的多个返回路径（接地）和信号线。 顶表面上的返回路径通过围绕电介质材料的至少一个边缘缠绕在底表面上的返回平面上。 顶层上的返回路径也可以分离每对或相邻的信号线。 电路基板可以有利地用于形成光电子模块。

公开(公告)号：US07107380B1

公开(公告)日：2006-09-12

申请号：US10728191

申请日：2003-12-04

申请人： Jitendra Mohan

发明人： Jitendra Mohan

IPC分类号： G06F13/00

CPC分类号： G06F1/1632

摘要： A single 10/100/1000BT Ethernet network physical layer chip and a single transformer, both within a mobile computer, are employed to provide a network connection to the mobile computer either through a network connection interface within a docking station receiving the mobile computer, when the mobile computer is docked, or through a network connection interface within the mobile computer, when the mobile computer is not docked. Connection traces to the unused network connection interface have the characteristics of a small, unterminated stub, with any reflections handled by intrinsic echo cancellation during 1000BT operation and negligible during 10/100BT operation.

摘要翻译： 采用在移动计算机内的单个10/100 / 1000BT以太网物理层芯片和单个变压器来通过接收移动计算机的坞站内的网络连接接口向移动计算机提供网络连接， 当移动计算机没有对接时，移动计算机被对接，或通过移动计算机内的网络连接接口。 到未使用的网络连接接口的连接轨迹具有小的未端接短截线的特征，在1000BT操作期间通过本征回声消除处理任何反射，并在10 / 100BT操作期间可忽略。

公开(公告)号：US07098540B1

公开(公告)日：2006-08-29

申请号：US10729389

申请日：2003-12-04

申请人： Jitendra Mohan ,  Luu Nguyen ,  Alan Segervall ,  Stephen Gee

发明人： Jitendra Mohan ,  Luu Nguyen ,  Alan Segervall ,  Stephen Gee

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05093 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/30107

摘要： The invention discloses an electrical interconnect with minimal parasitic capacitance. In one embodiment, an apparatus comprises a semiconductor substrate, and first and second support structures formed on the substrate, where the second support structure at least partially surrounds the first support structure on the substrate. The first and second support structures are each configured to support an electrical connector to be formed over the first and second support structures on the substrate.

摘要翻译： 本发明公开了一种具有最小寄生电容的电互连。 在一个实施例中，一种装置包括半导体衬底，以及形成在衬底上的第一和第二支撑结构，其中第二支撑结构至少部分地围绕衬底上的第一支撑结构。 第一和第二支撑结构各自被配置为支撑要形成在基板上的第一和第二支撑结构上的电连接器。

公开(公告)号：US06765275B1

公开(公告)日：2004-07-20

申请号：US10290481

申请日：2002-11-06

申请人： Neeraj Anil Pendse ,  Jia Liu ,  Jitendra Mohan ,  Bruce Carlton Roberts ,  Luu Thanh Nguyen ,  William Paul Mazotti

发明人： Neeraj Anil Pendse ,  Jia Liu ,  Jitendra Mohan ,  Bruce Carlton Roberts ,  Luu Thanh Nguyen ,  William Paul Mazotti

IPC分类号： H01L310203

CPC分类号： H05K1/0219 ,  G02B6/4201 ,  H01L23/49838 ,  H01L25/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/189 ,  H05K3/403 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/10121 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05644

摘要： A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.

公开(公告)号：US06559787B1

公开(公告)日：2003-05-06

申请号：US09911233

申请日：2001-07-23

申请人： Arlo J. Aude ,  Laurence D. Lewicki ,  Jitendra Mohan

发明人： Arlo J. Aude ,  Laurence D. Lewicki ,  Jitendra Mohan

IPC分类号： H03M138

CPC分类号： H03K3/013 ,  H03K3/356139 ,  H03K5/2481 ,  H03K5/249

摘要： There is disclosed a comparator comprising: 1) a first comparison circuit capable of receiving an input signal, wherein the first comparison circuit is enabled and compares the signal when a received LATCH signal is enabled and is disabled when the received LATCH signal is disabled; and 2) a second comparison circuit coupled to the input signal in parallel with the first comparison circuit, wherein an input stage of the second comparison circuit is substantially identical to an input stage of the first comparison circuit. The second comparison circuit is enabled and compares the input signal when the received LATCH is signal is disabled and is disabled when the received LATCH signal is enabled.

摘要翻译： 公开了一种比较器，包括：1）能够接收输入信号的第一比较电路，其中所述第一比较电路被使能，并且当所接收的LATCH信号被使能时将所述信号进行比较，并且当所接收的LATCH信号被禁止时被禁用; 以及2）与所述第一比较电路并联耦合到所述输入信号的第二比较电路，其中所述第二比较电路的输入级基本上与所述第一比较电路的输入级相同。 当接收的LATCH信号被禁止时，第二比较电路被使能并比较输入信号，并且当所接收的LATCH信号被使能时被禁止。

公开(公告)号：US6160851A

公开(公告)日：2000-12-12

申请号：US32547

申请日：1998-02-26

申请人： Gary A. Brown ,  Jitendra Mohan

发明人： Gary A. Brown ,  Jitendra Mohan

IPC分类号： H04L25/02 ,  H04B17/00

CPC分类号： H04L25/0272 ,  H04L25/0266 ,  H04L25/0286

摘要： A calibration circuit adjusts a differential output voltage from a line driver circuit when the differential output voltage falls outside a specified tolerance range. The calibration circuit includes a sample and hold circuit which samples the differential output voltage and holds a representative signal. A comparator compares the held signal with a reference voltage signal. When the held signal is greater than the reference voltage signal the comparator outputs a LOW signal and when the held signal is less than the reference voltage signal the comparator outputs a HIGH signal. The comparator output signal is stored in a memory circuit of a control logic. The control logic instructs an up/down counter to increment when the comparator output is LOW and to decrement when the comparator output is HIGH. A calibration current source sinks a unit of calibration current when the comparator output is LOW and sources a unit of calibration current when the comparator output is HIGH. The calibration current is added to an input current to calibrate the differential output voltage towards the specified tolerance range. In a next cycle of the calibration sequence, if a new comparator output signal is different from that stored in the memory circuit, the calibration sequence ceases. However, if the new comparator output signal is the same as that stored in the memory circuit the calibration sequence continues.

摘要翻译： 当差分输出电压超出指定的公差范围时，校准电路调节来自线路驱动器电路的差分输出电压。 校准电路包括采样和保持电路，其对差分输出电压进行采样并保持代表信号。 比较器将保持的信号与参考电压信号进行比较。 当保持信号大于参考电压信号时，比较器输出低电平信号，当保持信号小于参考电压信号时，比较器输出高电平信号。 比较器输出信号存储在控制逻辑的存储电路中。 当比较器输出为低电平时，控制逻辑指令升/降计数器递增，当比较器输出为高电平时，该指令递减。 当比较器输出为低电平时，校准电流源吸收一个校准电流单位，当比较器输出为高电平时，校准电流源产生校准电流单位。 将校准电流添加到输入电流，以将差分输出电压校准到指定的公差范围。 在校准序列的下一个周期中，如果新的比较器输出信号与存储电路中存储的输出信号不同，校准序列将停止。 然而，如果新的比较器输出信号与存储电路中存储的信号相同，校准序列将继续。

公开(公告)号：US5818269A

公开(公告)日：1998-10-06

申请号：US829845

申请日：1997-04-01

申请人： Gary Brown ,  John Andrew Campbell ,  Jitendra Mohan

发明人： Gary Brown ,  John Andrew Campbell ,  Jitendra Mohan

IPC分类号： H03K17/687 ,  G01R19/00

CPC分类号： H03K17/6872

摘要： A current mode driver capable of driving both 10 Base-T signalling and 100 Base-T signalling in a Local Area Network (LAN) includes two or four current sources. In a first embodiment, a differential signal generator drives four current sources. The generator outputs four signals, one of which is received by each current source. Using these signals, two of the current sources push or pull current across the load in one direction, while the other two current sources push or pull current across the load in the other direction, such that a full differential signal is generated across the load. In another embodiment, a signal generator drives two current sources which drive into the load one at a time. Two switches provide either high resistance or low resistance during half of a signal cycle such that current is pulled through the load in one direction, and prevented from flowing through the load in the other direction. When one current source turns on upon receipt of an input signal, one switch provides low resistance such that when the current source drives current into the load a voltage is generated across the load. At the same time, the other switch provides high resistance such that virtually no current is conducted. In this manner, only one current source pulls current across the load at a given time, while the other current source remains in a standby state.

摘要翻译： 能够在局域网（LAN）中驱动10 Base-T信令和100 Base-T信令的当前模式驱动器包括两个或四个电流源。 在第一实施例中，差分信号发生器驱动四个电流源。 发生器输出四个信号，其中一个信号由每个电流源接收。 使用这些信号，两个电流源在一个方向上推或拉电流穿过负载，而另外两个电流源在另一个方向上推或拉电流跨越负载，从而跨负载产生全差分信号。 在另一个实施例中，信号发生器驱动两个电流源，一次一个驱动到负载中。 两个开关在信号周期的一半期间提供高电阻或低电阻，使得电流在一个方向上被拉动通过负载，并且被阻止沿着另一个方向流过负载。 当一个电流源在接收到输入信号时接通，一个开关提供低电阻，使得当电流源将电流驱动到负载中时，负载产生电压。 同时，另一个开关提供高电阻，从而几乎不会导通电流。 以这种方式，只有一个电流源在给定的时间在负载上拉电流，而另一个电流源保持在待机状态。

公开(公告)号：US08873592B1

公开(公告)日：2014-10-28

申请号：US11975421

申请日：2007-10-19

申请人： Jitendra Mohan

发明人： Jitendra Mohan

IPC分类号： H03M5/16

CPC分类号： H03M5/16

摘要： A system and method is disclosed for adding a low data rate data channel to a 100Base-T Ethernet link without significantly impacting an IEEE defined 100Base-T protocol for the Ethernet link. A dual data channel transmitter encodes a high data rate data stream in an MLT-3 encoder and encodes a low data rate data stream using bit representations that are not valid bit representations in the MLT-3 encoder. The dual data channel transmitter transmits both of the encoded bit streams in a dual data stream. A dual data channel receiver receives the dual data stream and separates and decodes the two bit streams. A low data rate data channel is provided in conjunction with a high data rate data channel without significantly impacting the operation of the high data rate data channel.

摘要翻译： 公开了一种用于向100Base-T以太网链路添加低数据速率数据信道而不显着影响用于以太网链路的IEEE定义的100Base-T协议的系统和方法。 双数据信道发射机对MLT-3编码器中的高数据速率数据流进行编码，并且使用在MLT-3编码器中不是有效位表示的比特表示对低数据速率数据流进行编码。 双数据信道发射机在双数据流中发送两个编码比特流。 双数据通道接收器接收双数据流并分离和解码两个比特流。 结合高数据速率数据信道提供低数据速率数据信道，而不显着影响高数据速率数据信道的操作。

公开(公告)号：US07630422B1

公开(公告)日：2009-12-08

申请号：US11036767

申请日：2005-01-14

申请人： Ramsin M. Ziazadeh ,  Jitendra Mohan

发明人： Ramsin M. Ziazadeh ,  Jitendra Mohan

IPC分类号： H01S3/00

CPC分类号： H01S5/0427 ,  H01S5/183

摘要： A driver for a vertical-cavity surface emitting laser (VCSEL) is provided that includes a bias current source, a modulation current source, and an output tracking circuit. The bias current source is operable to generate a bias current and an output voltage for the VCSEL and to generate a replica output voltage. The modulation current source is coupled to the bias current source by at least one switch and is operable to generate a modulation current for the VCSEL when the switch is closed. The output tracking circuit is coupled to the bias current source. The output tracking circuit is operable to generate a feedback signal for the bias current source based on the output voltage and the replica output voltage. The bias current source is also operable to generate the output voltage and the replica output voltage based on the feedback signal.

摘要翻译： 提供了一种用于垂直腔表面发射激光器（VCSEL）的驱动器，其包括偏置电流源，调制电流源和输出跟踪电路。 偏置电流源可操作以产生用于VCSEL的偏置电流和输出电压并产生复制输出电压。 调制电流源通过至少一个开关耦合到偏置电流源，并且可操作以在开关闭合时产生用于VCSEL的调制电流。 输出跟踪电路耦合到偏置电流源。 输出跟踪电路可操作以基于输出电压和副本输出电压产生偏置电流源的反馈信号。 偏置电流源还可操作以基于反馈信号产生输出电压和副本输出电压。

公开(公告)号：US07477077B1

公开(公告)日：2009-01-13

申请号：US11633728

申请日：2006-12-05

申请人： Arlo Aude ,  Jitendra Mohan ,  Ivan Duzevik

发明人： Arlo Aude ,  Jitendra Mohan ,  Ivan Duzevik

IPC分类号： H03K5/22

CPC分类号： H03K5/19 ,  H03K3/3565

摘要： An apparatus, device, and method for loss of signal detection in a receiver are provided. A reference circuit is operable to rectify a reference signal. An input circuit is operable to rectify an input signal. A comparator is operable to compare outputs of the reference circuit and the input circuit and to generate an output signal based on the comparison. The output signal indicates whether the input signal falls within threshold limits defined by the reference signal. A second reference circuit and a second input circuit could also be used, and the reference circuits and input circuits can be selectively enabled and disabled based on which of multiple differential pairs is enabled in a receiver receiving the input signal. The differential pairs can be used in the receiver to generate an output signal based on the input signal.

摘要翻译： 提供了一种用于在接收机中丢失信号检测的装置，装置和方法。 参考电路可操作以校正参考信号。 输入电路可操作以校正输入信号。 比较器可操作以比较参考电路和输入电路的输出，并根据比较产生输出信号。 输出信号指示输入信号是否落在由参考信号限定的阈值范围内。 也可以使用第二参考电路和第二输入电路，并且可以基于在接收输入信号的接收器中使能多个差分对来选择性地使能和禁用参考电路和输入电路。 差分对可以在接收机中用于基于输入信号产生输出信号。