公开(公告)号：US09280498B2

公开(公告)日：2016-03-08

申请号：US14002945

申请日：2012-02-23

申请人： Jun Suzuki ,  Masahiko Takahashi ,  Youichi Hidaka ,  Teruyuki Baba ,  Takashi Yoshikawa

发明人： Jun Suzuki ,  Masahiko Takahashi ,  Youichi Hidaka ,  Teruyuki Baba ,  Takashi Yoshikawa

IPC分类号： G06F13/28 ,  G06F13/16 ,  G06F13/10

CPC分类号： G06F13/16 ,  G06F13/102 ,  G06F13/28 ,  G06F2213/0026

摘要： A CPU 80 controls data transfer from a first device to a second device in a kernel mode. A main memory 90 stores data to be transferred from the first device to the second device. The CPU 80 has: a first device control means 81 which controls the first device; a second device control means which controls the second device; and a data transfer control means 83 which makes a read instruction which instructs the first device control means 81 to store data read from the first device in the main memory 3, and makes a write instruction which instructs the second device control means 82 to write the data stored in the main memory 3 in the second device.

摘要翻译： CPU 80以内核模式控制从第一设备到第二设备的数据传输。 主存储器90存储要从第一设备传送到第二设备的数据。 CPU80具有：控制第一装置的第一装置控制装置81; 控制第二装置的第二装置控制装置; 以及数据传送控制装置83，其使得指令第一装置控制装置81将从第一装置读取的数据存储在主存储器3中的读取指令，并且进行指示第二装置控制装置82写入的写指令 存储在第二装置中的主存储器3中的数据。

公开(公告)号：US20110219164A1

公开(公告)日：2011-09-08

申请号：US12674337

申请日：2008-08-25

申请人： Jun Suzuki ,  Youichi Hidaka ,  Takashi Yoshikawa

发明人： Jun Suzuki ,  Youichi Hidaka ,  Takashi Yoshikawa

IPC分类号： G06F13/36

CPC分类号： G06F13/12

摘要： Virtual Functions (VFs) 602-1 to 602-N of an I/O device are separately allocated to a plurality of computers 1-1 to 1-N. In an address swap table 506, a root domain that is an address space of the computer 1 and mapping information of an I/O domain that is an address space unique to the I/O device 6 are registered. Mapping is set with the VFs 602-1 to 602-N as units. When accessing the VFs 602-1 to 602-N of the I/O device 6 to which each of the computers 1-1 to 1-N is allocated, an I/O packet transfer unit 701 checks the address swap table 506 to swap source/destination addresses recorded in packet headers.

摘要翻译： I / O设备的虚拟功能（VF）602-1至602-N分别分配给多个计算机1-1至1-N。 在地址交换表506中，登记作为计算机1的地址空间的根域和作为I / O装置6唯一的地址空间的I / O域的映射信息。 映射以VFS 602-1至602-N为单位设置。 当访问分配了计算机1-1至1-N中的每一个的I / O设备6的VFS 602-1至602-N时，I / O分组传送单元701检查地址交换表506以交换 记录在报头中的源/目的地址。

公开(公告)号：US20080104328A1

公开(公告)日：2008-05-01

申请号：US11928997

申请日：2007-10-30

申请人： Takashi Yoshikawa ,  Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

发明人： Takashi Yoshikawa ,  Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

IPC分类号： G06F12/08

CPC分类号： G06F12/0833 ,  G06F12/0862 ,  G06F2212/602 ,  Y02D10/13

摘要： A local-memory side data transfer unit increments the number of addresses, reads out data from a local memory, and stores the data into a cache memory of a remote-memory side data transfer unit. For preventing data mismatching with the local memory from being stored into the cache memory, a cache clearing operation is executed in units of an elapse of a round trip time period for data transfer between the local memory and the remote memory. Alternatively, the cache clearing operation is executed upon receipt of a signal notifying data transfer of data stored at a specified address.

摘要翻译： 本地存储器侧数据传送单元增加地址数量，从本地存储器读出数据，并将数据存储到远程存储器侧数据传送单元的高速缓冲存储器中。 为了防止与本地存储器的数据不匹配被存储到高速缓冲存储器中，以本地存储器和远程存储器之间的数据传送的往返时间周期为单位执行高速缓存清除操作。 或者，在接收到通知数据传送存储在指定地址的数据的信号时执行高速缓存清除操作。

公开(公告)号：US08412875B2

公开(公告)日：2013-04-02

申请号：US13037999

申请日：2011-03-01

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/36

CPC分类号： G06F13/4022

摘要： A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register.

摘要翻译： 作为主系统的一部分的网络系统包括：具有第一控制单元的第一PCI快速网桥和终止第一PCI Express总线的第一PCI Express适配器; 以及通过网络连接到第一PCI快速网络桥的第二PCI快速网络桥。 第二PCI Express网络桥包括第二控制单元和终止第二PCI Express总线的第二PCI Express适配器，其中第一控制单元检测从第一PCI Express适配器发送的分组的目的地，搜索第一PCI Express网络的物理地址 来自分组封装表的目的地，并且将分组封装在帧中，使得帧包括物理地址，并且其中第二控制单元去除标签到分组的封装，并且通过第二PCI Express总线将分组传送到目的地 通过参考PCI Express配置寄存器。

公开(公告)号：US20080040526A1

公开(公告)日：2008-02-14

申请号：US11836357

申请日：2007-08-09

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

IPC分类号： G06F13/00

CPC分类号： G06F13/4081 ,  G06F2213/0026

摘要： A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.

摘要翻译： 虚拟PCI Express设备1600指示在PCI Express初始配置周期中存在伪I / O设备以为将来预期安装的设备预留资源空间，并且当将I / O设备1400插入时 未占用的时隙1605，虚拟PCI Express设备控制逻辑1602经由热插拔控制线1601通知下游PCI-PCI桥1504，并且下游PCI-PCI桥1504向CPU 1100产生中断以通知其插入 的I / O设备1400符合由PCI-SIG标准定义的热插拔程序，并且配置软件1000被调用配置所插入的I / O设备1400。

公开(公告)号：US20070198763A1

公开(公告)日：2007-08-23

申请号：US11707084

申请日：2007-02-16

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/00

CPC分类号： G06F13/4022

摘要： A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.

摘要翻译： 通过以太网将多个外围设备连接到多个CPU中的任意一个的PCI Express交换机由多个上游和下游PCI Express网络桥，以太网交换机和系统管理器构成。 上游和下游PCI Express网络桥接器中的每一个包括PCI Express适配器，其终止PCI Express总线的链路，终止到以太网交换机的链路的网络适配器以及将TLP封装在帧中的控制单元， 其目的地是目的地与之连接以发送和接收帧的网桥的MAC地址。 因为包括通过网络连接到多个上游PCI Express网桥的多个上游PCI Express网络桥和多个下游PCI Express网桥的根据本发明的交换机等同于传统的PCI Express交换机， 不用改变传统的PCI软件。

公开(公告)号：US08200880B2

公开(公告)日：2012-06-12

申请号：US11857846

申请日：2007-09-19

申请人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

发明人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

IPC分类号： H04L12/407

CPC分类号： G06F13/4027 ,  G06F11/2017

摘要： An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.

摘要翻译： I / O设备共享系统包括CPU，耦合到CPU的多个路由复合体，耦合到路由复合体的上游PCI Express桥，通过网络耦合到上游PCI Express桥的下游PCI Express桥，以及I / O设备耦合到下游PCI Express桥。 在上述配置中，使用网络的标识符（例如，以太网VLAN ID）在CPU之间共享I / O设备，这些标识符被设置为使得它们在相应的CPU和必要的I / O设备之间不重叠 被设置为一个集合标识符。 此外，将标识符设置为由相应CPU所需的多个相同的I / O设备。

公开(公告)号：US07917681B2

公开(公告)日：2011-03-29

申请号：US11707084

申请日：2007-02-16

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/36

CPC分类号： G06F13/4022

摘要： A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.

摘要翻译： 通过以太网将多个外围设备连接到多个CPU中的任意一个的PCI Express交换机由多个上游和下游PCI Express网络桥，以太网交换机和系统管理器构成。 上游和下游PCI Express网络桥接器中的每一个包括PCI Express适配器，其终止PCI Express总线的链路，终止到以太网交换机的链路的网络适配器以及将TLP封装在帧中的控制单元， 其目的地是目的地与之连接以发送和接收帧的网桥的MAC地址。 因为包括通过网络连接到多个上游PCI Express网桥的多个上游PCI Express网络桥和多个下游PCI Express网桥的根据本发明的交换机等同于传统的PCI Express交换机， 不用改变传统的PCI软件。

公开(公告)号：US07877521B2

公开(公告)日：2011-01-25

申请号：US11836357

申请日：2007-08-09

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

IPC分类号： G06F3/00

CPC分类号： G06F13/4081 ,  G06F2213/0026

摘要： A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.

摘要翻译： 虚拟PCI Express设备1600指示在PCI Express初始配置周期中存在伪I / O设备以为将来预期安装的设备预留资源空间，并且当将I / O设备1400插入时 未占用的时隙1605，虚拟PCI Express设备控制逻辑1602经由热插拔控制线1601通知下游PCI-PCI桥1504，并且下游PCI-PCI桥1504向CPU 1100产生中断以通知其插入 的I / O设备1400符合由PCI-SIG标准定义的热插拔程序，并且配置软件1000被调用配置所插入的I / O设备1400。

公开(公告)号：US08417865B2

公开(公告)日：2013-04-09

申请号：US13469335

申请日：2012-05-11

申请人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

发明人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

IPC分类号： H04L12/407

CPC分类号： G06F13/4027 ,  G06F11/2017

摘要： An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.

摘要翻译： I / O设备共享系统包括CPU，耦合到CPU的多个路由复合体，耦合到路由复合体的上游PCI Express桥，通过网络耦合到上游PCI Express桥的下游PCI Express桥，以及I / O设备耦合到下游PCI Express桥。 在上述配置中，使用网络的标识符（例如，以太网VLAN ID）在CPU之间共享I / O设备，这些标识符被设置为使得它们在相应的CPU和必要的I / O设备之间不重叠 被设置为一个集合标识符。 此外，将标识符设置为由相应CPU所需的多个相同的I / O设备。