Non-volatile memory device
    22.
    发明授权
    Non-volatile memory device 失效
    非易失性存储器件

    公开(公告)号:US08243530B2

    公开(公告)日:2012-08-14

    申请号:US12713219

    申请日:2010-02-26

    CPC classification number: G11C7/12 G11C5/147 G11C16/24 G11C2207/005

    Abstract: A non-volatile memory device includes a feedback circuit and a precharge switching transistor. The feedback circuit generates a feedback signal based on a voltage level of a bitline during a precharge operation. The precharge switching transistor, in response to the feedback signal, controls a precharge current for precharging the bitline. The speed of the precharge operation may be increased and/or mismatch of the bias signals in precharging a plurality of bitlines may be reduced.

    Abstract translation: 非易失性存储器件包括反馈电路和预充电开关晶体管。 反馈电路在预充电操作期间基于位线的电压电平产生反馈信号。 响应于反馈信号,预充电开关晶体管控制用于预充电位线的预充电电流。 可以增加预充电操作的速度和/或可以减少对多个位线进行预充电的偏置信号的失配。

    FLASH MEMORY DEVICE REDUCING NOISE OF COMMON SOURCE LINE, PROGRAM VERIFY METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME
    24.
    发明申请
    FLASH MEMORY DEVICE REDUCING NOISE OF COMMON SOURCE LINE, PROGRAM VERIFY METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME 有权
    闪存存储器件减少通用源线的噪声,程序验证方法和包括其的存储器系统

    公开(公告)号:US20100002507A1

    公开(公告)日:2010-01-07

    申请号:US12472639

    申请日:2009-05-27

    Abstract: A flash memory device controls a common source line voltage and performs a program verify method. A plurality of memory cells is connected between a bit line and the common source line. A data input/output circuit is connected to the bit line and is configured to store data to be programmed in a selected memory cell of the plurality of memory cells. The data input/output circuit maintains data to be programmed within the data input/output circuit during a program verify operation, and decreases noise in the common source line by selectively precharging the bit line based on the data to be programmed.

    Abstract translation: 闪存器件控制公共源极线电压并执行程序验证方法。 多个存储单元连接在位线和公共源极线之间。 数据输入/输出电路连接到位线,并且被配置为存储要编程在多个存储器单元的所选存储单元中的数据。 数据输入/输出电路在编程验证操作期间保持在数据输入/输出电路内编程的数据,并且通过基于要编程的数据选择性地预充电位线来降低公共源极线中的噪声。

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