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公开(公告)号:US20220069908A1
公开(公告)日:2022-03-03
申请号:US17001931
申请日:2020-08-25
Applicant: Juniper Networks, Inc.
Inventor: John Parker
Abstract: Power consumption in MZI-based integrated photonic switches or filters throughout the operational life can be reduced by reducing fabrication-induced phase misalignment between the unpowered operational mode of the switch or filter and the predominant switch state, and/or by enabling low-power compensation for any such misalignment. In various embodiments, misalignment is reduced by increasing the width of the waveguides implementing the interferometer arms of the MZI, and/or by structuring a region containing the MZI symmetrically to diminish stress-induced misalignment. In some embodiments, phase tuners are used to actively compensate for any phase misalignment, with a tuner drive voltage substantially lower than used to switch to the non-dominant state.
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公开(公告)号:US11251874B1
公开(公告)日:2022-02-15
申请号:US17008516
申请日:2020-08-31
Applicant: Juniper Networks, Inc.
Inventor: John Parker
Abstract: High-channel-count optical transceivers can be implemented in photonic integrated circuits (PICs) with shared lasers, splitting the light of each laser between multiple lanes prior to modulation. To reduce waveguide crossings in such PICs, transmitter and self-test functionality may be distributed between separate device layers. Various beneficial transmitter circuitry layouts are disclosed.
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公开(公告)号:US20220029705A1
公开(公告)日:2022-01-27
申请号:US17476122
申请日:2021-09-15
Applicant: Juniper Networks, Inc.
Inventor: John Parker , John Garcia , Brandon Gomez , Molly Piels , Anand Ramaswamy
IPC: H04B10/079 , H04B10/40
Abstract: An optical device such as an optical transceiver can include a cascaded built-in self-test structure that can be configured in testing mode using an active power mode and can sufficiently attenuate light away from a loopback path in an inactive power mode. The optical device can include a wafer top emitter that can be used to tune a light source for testing and calibration of optical components while the built-in self-test structure is in active mode.
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公开(公告)号:US10998979B1
公开(公告)日:2021-05-04
申请号:US17001951
申请日:2020-08-25
Applicant: Juniper Networks, Inc.
Inventor: John Parker
IPC: H04B10/516 , G02F1/015 , H04B10/40
Abstract: An optical modulator of an optical transceiver can be calibrated using intermediate frequency (IF) signals to generate accurate crossing point values (e.g., DC bias). A photodiode can measure output from the optical modulator at intermediate and high-speed frequencies to generate crossing point values that avoid crossing point errors. A target crossing point can be selected at any value (e.g., 40%, 50%) and bias values can be generated from IF signals and then stored in a lookup date for setting the modulator bias during operation.
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公开(公告)号:US10965369B2
公开(公告)日:2021-03-30
申请号:US16854012
申请日:2020-04-21
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Brian Robert Koch , Gregory Alan Fish , Hyundai Park
IPC: H04B10/077 , G02B6/12 , H01L31/0224 , H01L31/0232 , H01L31/0304 , H01L31/0352 , H01L31/105 , H04B10/40
Abstract: Photonically integrated normal incidence photodetectors (NIPDs) and associated in-plane waveguide structures optically coupled to the NIPDs can be configured to allow for both in-plane and normal-incidence detection. In photonic circuits with light-generation capabilities, such as integrated optical transceivers, the ability of the NIPDs to detect in-plane light is used, in accordance with some embodiments, to provide self-test functionality.
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公开(公告)号:US20190199060A1
公开(公告)日:2019-06-27
申请号:US16286358
申请日:2019-02-26
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Jared Bauters , Jonathan Edgar Roth , Erik Norberg , Greogry Alan Fish
CPC classification number: H01S5/0085 , G01J3/02 , G01J9/0246 , G02B6/12007 , G02B6/29353 , G02B6/29395 , G02B6/29398 , H01S5/0264 , H01S5/0607 , H01S5/0612 , H01S5/0617 , H01S5/06804 , H01S5/0687
Abstract: Described are various configurations of integrated wavelength lockers including asymmetric Mach-Zehnder interferometers (AMZIs) and associated detectors. Various embodiments provide improved wavelength-locking accuracy by using an active tuning element in the AMZI to achieve an operational position with high locking sensitivity, a coherent receiver to reduce the frequency-dependence of the locking sensitivity, and/or a temperature sensor and/or strain gauge to computationally correct for the effect of temperature or strain changes.
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公开(公告)号:US10263390B2
公开(公告)日:2019-04-16
申请号:US15689338
申请日:2017-08-29
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Jared Bauters , Jonathan Edgar Roth , Erik Norberg , Gregory Alan Fish
Abstract: Described are various configurations of integrated wavelength lockers including asymmetric Mach-Zehnder interferometers (AMZIs) and associated detectors. Various embodiments provide improved wavelength-locking accuracy by using an active tuning element in the AMZI to achieve an operational position with high locking sensitivity, a coherent receiver to reduce the frequency-dependence of the locking sensitivity, and/or a temperature sensor and/or strain gauge to computationally correct for the effect of temperature or strain changes.
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28.
公开(公告)号:US20190072715A1
公开(公告)日:2019-03-07
申请号:US16181868
申请日:2018-11-06
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Gregory Alan Fish , Martin A. Spannagel , Antonio Labaro
IPC: G02B6/122 , G02B6/136 , G02B6/132 , H01L21/306 , H01L21/02 , H01L21/762
Abstract: Methods and systems are presented for heterogeneous integration of photonics and electronics with atomic layer deposition (ALD) bonding. One method includes operations for forming a compound semiconductor and for depositing (e.g., via atomic layer deposition) a continuous film of a protection material (e.g., Al2O3) on a first surface of the compound semiconductor. Further, the method includes an operation for forming a silicon on insulator (SOI) wafer, with the SOI wafer comprising one or more waveguides. The method further includes bonding the compound semiconductor at the first surface to the SOI wafer to form a bonded structure and processing the bonded structure. The protection material protects the compound semiconductor from acid etchants during further processing of the bonded structure.
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公开(公告)号:US20190052053A1
公开(公告)日:2019-02-14
申请号:US16155113
申请日:2018-10-09
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Jared Bauters , Jonathan Edgar Roth , Erik Norberg , Gregory Alan Fish
Abstract: Described are various configurations of integrated wavelength lockers including asymmetric Mach-Zehnder interferometers (AMZIs) and associated detectors. Various embodiments provide improved wavelength-locking accuracy by using an active tuning element in the AMZI to achieve an operational position with high locking sensitivity, a coherent receiver to reduce the frequency-dependence of the locking sensitivity, and/or a temperature sensor and/or strain gauge to computationally correct for the effect of temperature or strain changes.
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30.
公开(公告)号:US20180203188A1
公开(公告)日:2018-07-19
申请号:US15408725
申请日:2017-01-18
Applicant: Juniper Networks, Inc.
Inventor: John Parker , Gregory Alan Fish , Martin A. Spannagel , Antonio Labaro
IPC: G02B6/122 , H01L21/762 , H01L21/02 , H01L21/306 , G02B6/132 , G02B6/136
CPC classification number: G02B6/122 , G02B6/132 , G02B6/136 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L21/0228 , H01L21/30617 , H01L21/76251
Abstract: Methods and systems are presented for heterogeneous integration of photonics and electronics with atomic layer deposition (ALD) bonding. One method includes operations for forming a compound semiconductor and for depositing (e.g., via atomic layer deposition) a continuous film of a protection material (e.g., Al2O3) on a first surface of the compound semiconductor. Further, the method includes an operation for forming a silicon on insulator (SOI) wafer, with the SOI wafer comprising one or more waveguides. The method further includes bonding the compound semiconductor at the first surface to the SOI wafer to form a bonded structure and processing the bonded structure. The protection material protects the compound semiconductor from acid etchants during further processing of the bonded structure.
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