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公开(公告)号：US10340001B2
公开(公告)日：2019-07-02
申请号：US15751650
申请日：2016-08-23
Inventor： Mohammed Affan Zidan , Hesham Omran , Rawan Naous , Ahmed Sultan Salem , Khaled Nabil Salama
Abstract: Methods are provided for mitigating problems caused by sneak-paths current during memory cell access in gateless arrays. Example methods contemplated herein utilize adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer memory system to address this sneak-paths problem. The method of the invention is a method for reading a target memory cell located at an intersection of a target row of a gateless array and a target column of the gateless array, the method comprising: —reading a value of the target memory cell; and—calculating an actual value of the target memory cell based on the read value of the memory cell and a component of the read value caused by sneak path current. Utilizing either an “initial bits” strategy or a “dummy bits” strategy in order to calculate the component of the read value caused by sneak path current, example embodiments significantly reduce the number of memory accesses pixel for an array readout. In addition, these strategies consume an order of magnitude less power in comparison to alternative state-of-the-art readout techniques.
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Patent Agency Ranking
公开(公告)号：US10297318B2
公开(公告)日：2019-05-21
申请号：US15735978
申请日：2016-06-15
Inventor： Mohammed Affan Zidan , Hesham Omran , Ahmed Sultan Salem , Khaled Nabil Salama
Abstract: A method for readout of a gated memristor array, a memristor array readout circuit and method of fabrication thereof are provided. In the context of the method, the method includes selecting a row of a memristor array associated with a desired cell, measuring the value of the selected memristor row, and selecting a column of a memristor array associated with the desired cell. The selection of the column and selection of the row selects the desired cell. The method also includes measuring the value of the memristor selected row with the selected desired cell and determining the value of the desired cell based on the value of the selected memristor row and the value of the selected memristor row with the selected desired cell.
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公开(公告)号：US20180233196A1
公开(公告)日：2018-08-16
申请号：US15751650
申请日：2016-08-23
Inventor： Mohammed Affan Zidan , Hesham Omran , Rawan Naous , Ahmed Sultan Salem , Khaled Nabil Salama
CPC classification number: G11C13/004 , G11C13/0009 , G11C13/0033 , G11C2013/005 , G11C2013/0057 , G11C2213/70 , H01L27/2481 , H01L45/1206
Abstract: Methods are provided for mitigating problems caused by sneak-paths current during memory cell access in gateless arrays. Example methods contemplated herein utilize adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer memory system to address this sneak-paths problem. The method of the invention is a method for reading a target memory cell located at an intersection of a target row of a gateless array and a target column of the gateless array, the method comprising: —reading a value of the target memory cell; and —calculating an actual value of the target memory cell based on the read value of the memory cell and a component of the read value caused by sneak path current. Utilizing either an “initial bits” strategy or a “dummy bits” strategy in order to calculate the component of the read value caused by sneak path current, example embodiments significantly reduce the number of memory accesses pixel for an array readout. In addition, these strategies consume an order of magnitude less power in comparison to alternative state-of-the-art readout techniques.
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公开(公告)号：US09304740B2
公开(公告)日：2016-04-05
申请号：US13826779
申请日：2013-03-14
Inventor： Mohamed L. Barakat , Abhinav S. Mansingka , Ahmed Gomaa Ahmed Radwan , Khaled Nabil Salama
Abstract: Various methods and systems related to chaos-based pseudo-random number generation are presented. In one example, among others, a system includes a pseudo-random number generator (PRNG) to generate a series of digital outputs and a nonlinear post processing circuit to perform an exclusive OR (XOR) operation on a first portion of a current digital output of the PRNG and a permutated version of a corresponding first portion of a previous post processed output to generate a corresponding first portion of a current post processed output. In another example, a method includes receiving at least a first portion of a current output from a PRNG and performing an XOR operation on the first portion of the current PRNG output with a permutated version of a corresponding first portion of a previous post processed output to generate a corresponding first portion of a current post processed output.
Abstract translation: 提出了与混沌伪随机数生成相关的各种方法和系统。 在一个示例中，系统包括用于产生一系列数字输出的伪随机数发生器（PRNG）和用于对当前数字输出的第一部分执行异或（XOR）运算的非线性后处理电路 以及先前后处理输出的对应的第一部分的置换版本，以生成当前后处理输出的对应的第一部分。 在另一示例中，一种方法包括从PRNG接收当前输出的至少第一部分并且对当前PRNG输出的第一部分执行XOR运算，其中先前后处理输出的相应第一部分的置换版本 产生当前后处理输出的对应的第一部分。
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公开(公告)号：US20140240894A1
公开(公告)日：2014-08-28
申请号：US14239346
申请日：2012-08-21
Inventor： Amro M. Elshurafa , Ahmed Gomaa Ahmed Radwan , Ahmed A. Emira , Khaled Nabil Salama
CPC classification number: H01L28/40 , H01G5/16 , H01G5/18 , H01G7/00 , H01G13/00 , H01L28/86 , Y10T29/43
Abstract: In accordance with the present disclosure, one embodiment of a fractal variable capacitor comprises a capacitor body in a microelectromechanical system (MEMS) structure, wherein the capacitor body has an upper first metal plate with a fractal shape separated by a vertical distance from a lower first metal plate with a complementary fractal shape; and a substrate above which the capacitor body is suspended.
Abstract translation: 根据本公开，分形可变电容器的一个实施例包括在微机电系统（MEMS）结构中的电容器主体，其中电容器主体具有分隔形状的上部第一金属板，其具有与下部第一 具有互补分形的金属板; 以及其上悬挂有电容器主体的基板。
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公开(公告)号：US20140101217A1
公开(公告)日：2014-04-10
申请号：US13826779
申请日：2013-03-14
Inventor： Mohamed L. Barakat , Abhinav S. Mansingka , Ahmed Gomaa Ahmed Radwan , Khaled Nabil Salama
IPC: G06F7/58
Abstract: Various methods and systems related to chaos-based pseudo-random number generation are presented. In one example, among others, a system includes a pseudo-random number generator (PRNG) to generate a series of digital outputs and a nonlinear post processing circuit to perform an exclusive OR (XOR) operation on a first portion of a current digital output of the PRNG and a permutated version of a corresponding first portion of a previous post processed output to generate a corresponding first portion of a current post processed output. In another example, a method includes receiving at least a first portion of a current output from a PRNG and performing an XOR operation on the first portion of the current PRNG output with a permutated version of a corresponding first portion of a previous post processed output to generate a corresponding first portion of a current post processed output.
Abstract translation: 提出了与混沌伪随机数生成相关的各种方法和系统。 在一个示例中，系统包括用于产生一系列数字输出的伪随机数发生器（PRNG）和用于对当前数字输出的第一部分执行异或（XOR）运算的非线性后处理电路 以及先前后处理输出的对应的第一部分的置换版本，以生成当前后处理输出的对应的第一部分。 在另一示例中，一种方法包括从PRNG接收当前输出的至少第一部分并且对当前PRNG输出的第一部分执行XOR运算，其中先前后处理输出的相应第一部分的置换版本 产生当前后处理输出的对应的第一部分。
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