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公开(公告)号：US20240062959A1
公开(公告)日：2024-02-22
申请号：US18495864
申请日：2023-10-27
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Cory Nelson , Seth Fuller , Alma Iris Cordova
CPC classification number: H01G4/008 , H01G4/1227 , H01G4/248 , H01G4/30
Abstract: The present invention is directed to a multilayer ceramic capacitor. The multilayer ceramic capacitor has a first end and a second end that is spaced apart from the first end in a longitudinal direction that is perpendicular to a lateral direction wherein the lateral direction and longitudinal direction are each perpendicular to a Z-direction. The multilayer ceramic capacitor comprises a monolithic body comprising a plurality of dielectric layers and a plurality of electrode layers parallel with the lateral direction. At least one electrode layer includes a first electrode comprising a connecting portion and a central portion extending from the connecting portion in the longitudinal direction wherein the central portion includes a Z-directional edge and the connecting portion includes an edge extending in both the longitudinal direction and the Z-direction and wherein the Z-directional edge of the central portion forms a first angle of from greater than 90° to less than 180° with the edge of the connecting portion. A first external termination disposed along the first end and a second external termination disposed along the second end.
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公开(公告)号：US20230368977A1
公开(公告)日：2023-11-16
申请号：US18315724
申请日：2023-05-11
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey Horn , Fumihiko Hidaka , Yuki Inanaga
Abstract: A broadband multilayer ceramic capacitor may include a first external termination and a second external termination. A first portion of the first external termination may be spaced apart from a first portion of the second external termination by a first external termination spacing distance. A first active electrode layer may include a rectangular first active electrode connected with the first external termination. A second active electrode layer may include a rectangular second active electrode connected with the second external termination. An outermost active electrode layer closest to an outer surface of the capacitor may be spaced apart from the outer surface by an outermost-active-to-surface distance. A ratio of a capacitor thickness in a Z-direction to the outermost-active-to-surface distance may be 1.1 or more. A ratio of a capacitor length in a longitudinal direction to the first external termination spacing distance may be 15 or more.
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公开(公告)号：US20230068137A1
公开(公告)日：2023-03-02
申请号：US17979020
申请日：2022-11-02
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: The present invention is directed to a multilayer ceramic capacitor that includes a plurality of active electrodes and at least one shield electrode that are each arranged within a monolithic body and parallel with a longitudinal direction. The capacitor may exhibit a first insertion loss value at a test frequency, which may be greater than about 2 GHz, in a first orientation relative to the mounting surface. The capacitor may exhibit a second insertion loss value at about the test frequency in a second orientation relative to the mounting surface and the capacitor is rotated 90 degrees or more about the longitudinal direction with respect to the first orientation. The longitudinal direction of the capacitor may be parallel with the mounting surface in each of the first and second orientations. The second insertion loss value may differ from the first insertion loss value by at least about 0.3 dB.
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公开(公告)号：US20220328248A1
公开(公告)日：2022-10-13
申请号：US17849923
申请日：2022-06-27
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey Horn , Jeffrey Cain
Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
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公开(公告)号：US20220293348A1
公开(公告)日：2022-09-15
申请号：US17830460
申请日：2022-06-02
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: A multilayer capacitor may include a monolithic body including a plurality of dielectric layers. A first external terminal may be disposed along a first end, and a second external terminal may be disposed along a second end of the capacitor. The external terminals may include respective bottom portions that extend along a bottom surface of the capacitor. The bottom portions of the external terminals may be spaced apart by a bottom external terminal spacing distance. A bottom shield electrode may be arranged within the monolithic body between a plurality of active electrodes and the bottom surface of the capacitor. The bottom shield electrode may be spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance that may range from about 3 microns to about 100 microns. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be less than about 4.
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Patent Agency Ranking
公开(公告)号：US20220216011A1
公开(公告)日：2022-07-07
申请号：US17567936
申请日：2022-01-04
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey A Horn
Abstract: A broadband multilayer ceramic capacitor may include a first external terminal and a second external terminal. A bottom portion of the first external terminal may be spaced apart from a bottom portion of the second external terminal by a bottom external terminal spacing distance. A first active electrode layer may include a first active electrode connected with the first external terminal and a second active electrode connected with the second external terminal and co-planar with the first electrode. A second active electrode layer may include a third active electrode connected to the first external terminal and a fourth active electrode connected to the second external terminal and co-planar with the fourth electrode. The first active electrode may overlap the fourth active electrode in the longitudinal direction. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be greater than about 4.
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公开(公告)号：US20220172891A1
公开(公告)日：2022-06-02
申请号：US17537827
申请日：2021-11-30
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Cory Nelson , Seth Fuller , Alma Iris Cordova
Abstract: The present invention is directed to a multilayer ceramic capacitor. The multilayer ceramic capacitor has a first end and a second end that is spaced apart from the first end in a longitudinal direction that is perpendicular to a lateral direction wherein the lateral direction and longitudinal direction are each perpendicular to a Z-direction. The multilayer ceramic capacitor comprises a monolithic body comprising a plurality of dielectric layers and a plurality of electrode layers parallel with the lateral direction. At least one electrode layer includes a first electrode comprising a connecting portion and a central portion extending from the connecting portion in the longitudinal direction wherein the central portion includes a Z-directional edge and the connecting portion includes an edge extending in both the longitudinal direction and the Z-direction and wherein the Z-directional edge of the central portion forms a first angle of from greater than 90° to less than 180° with the edge of the connecting portion. A first external termination disposed along the first end and a second external termination disposed along the second end.
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公开(公告)号：US20250111993A1
公开(公告)日：2025-04-03
申请号：US18725287
申请日：2022-12-28
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Craig Nies , Jeffrey Horn , Joseph M. Hock
Abstract: The present invention is directed to a surface mount coupling capacitor. The coupling capacitor includes a main body containing at least two sets of alternating dielectric layers and internal electrode layers wherein each set of alternating dielectric layers and internal electrode layers contains a first internal electrode layer and a second internal electrode layer. Each internal electrode layer includes a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer. The coupling capacitor includes external terminals electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor. The capacitor includes one or more dielectric regions including one or more air voids.
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公开(公告)号：US20250079321A1
公开(公告)日：2025-03-06
申请号：US18805598
申请日：2024-08-15
Applicant: KYOCERA AVX Components Corporation
Inventor： Jonathan Herr , Cory Nelson , Marianne Berolini , Joseph Hock
IPC: H01L23/538 , H01L23/00 , H01L23/48 , H01L25/00 , H01L25/065
Abstract: Vertically oriented interposer stacks, assemblies, and methods are provided. For example, a vertically oriented interposer stack includes a plurality of interposers and a plurality of components. Each component is disposed between adjacent interposers. Each interposer includes a first side surface opposite a second side surface along the vertical direction. The first side surface and the second side surface each extend along the longitudinal direction from a first end surface to a second end surface. Each interposer has a first external termination formed on the first side surface and a second external termination formed on the first side surface. The first and second external terminations are spaced apart along the longitudinal direction. The interposers are stacked along the lateral direction such that the first external terminations are generally aligned with one another along the lateral direction and the second external terminations are generally aligned with one another along the lateral direction.
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公开(公告)号：US12205766B2
公开(公告)日：2025-01-21
申请号：US18481273
申请日：2023-10-05
Applicant: KYOCERA AVX Components Corporation
Inventor： Marianne Berolini , Jeffrey A Horn
IPC: H01G4/012
Abstract: A broadband multilayer ceramic capacitor can include at least one active electrode layer including a first active electrode and a second active electrode. The first active electrode can have a central portion extending away from a base portion in a longitudinal direction. The second active electrode can include at least one arm extending away from a base portion towards the first end and overlapping the central portion of the first active electrode. A first shield electrode in a shield electrode region can have a central portion extending from a base portion. A second shield electrode can include an arm overlapping the central portion of the first shield electrode in the longitudinal direction. The shield electrode region can be spaced apart from the active electrode region by a shield-to-active distance that is greater than an active electrode spacing distance between respective active electrodes of the plurality of active electrodes.
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