公开(公告)号：US07298949B2

公开(公告)日：2007-11-20

申请号：US11042774

申请日：2005-01-24

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/10 ,  G02B6/12

CPC分类号： G02F1/025 ,  G02F2202/32

摘要： An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

摘要翻译： 基于SOI的光子带隙（PBG）电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束，从而显着减少光学损耗。 通过包括PBG结构，相关联的电触点可以放置在更接近有源区域而不影响光学性能，从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制，整个装置尺寸，电容和电阻也减小。

公开(公告)号：US20060140645A1

公开(公告)日：2006-06-29

申请号：US11362305

申请日：2006-02-22

申请人： Kalpendu Shastri ,  Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Montgomery ,  Soham Pathak ,  Katherine Yanushefski

发明人： Kalpendu Shastri ,  Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Montgomery ,  Soham Pathak ,  Katherine Yanushefski

IPC分类号： H04B10/04 ,  H04B10/12

CPC分类号： G02F1/025 ,  G02F1/0121 ,  G02F1/225 ,  G02F2001/0152 ,  H04B10/505 ,  H04B10/58

摘要： An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.

摘要翻译： 用于实现大于1Gb / s的开关速度的电光调制器装置利用预加重脉冲来加速用于形成电光调制器的光波导的折射率变化。 在一个实施例中，可以添加反馈回路以使用调制的光输出信号的一部分来调整预加重脉冲的幅度和持续时间以及用于调制的各种参考电平。 对于基于硅的电光调制器的自由载体的电光调制器，预加重脉冲用于加速在输入信号数据值之间的转变处的自由载流子的移动。

公开(公告)号：US07065301B2

公开(公告)日：2006-06-20

申请号：US10842064

申请日：2004-05-10

申请人： Kalpendu Shastri ,  Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Kalpendu Shastri ,  Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： H04B10/04 ,  G02B26/00

CPC分类号： G02F1/025 ,  G02F1/0121 ,  G02F1/225 ,  G02F2001/0152 ,  H04B10/505 ,  H04B10/58

摘要： An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.

摘要翻译： 用于实现大于1Gb / s的开关速度的电光调制器装置利用预加重脉冲来加速用于形成电光调制器的光波导的折射率变化。 在一个实施例中，可以添加反馈回路以使用调制的光输出信号的一部分来调整预加重脉冲的幅度和持续时间以及用于调制的各种参考电平。 对于基于硅的电光调制器的自由载体的电光调制器，预加重脉冲用于加速在输入信号数据值之间的转变处的自由载流子的移动。

公开(公告)号：US08340529B2

公开(公告)日：2012-12-25

申请号：US12813562

申请日：2010-06-11

申请人： Kalpendu Shastri ,  Bipin Dama ,  Vipulkumar Patel ,  Mark Webster

发明人： Kalpendu Shastri ,  Bipin Dama ,  Vipulkumar Patel ,  Mark Webster

IPC分类号： H04B10/12

CPC分类号： H04N7/22 ,  G09G5/006 ,  G09G2370/12 ,  G09G2370/18

摘要： An HDMI interconnect arrangement is presented that performs a pulse-amplitude modulation (PAM) conversion of the TMDS audio/video signals in order to simultaneously transmit all three channels over a single optical fiber. The set of three audio/video TMDS channels is applied as an input to a PAM-8 optical modulator, which functions to encode the set of three channels onto an optically-modulated output signal. The modulated optical signal is thereafter coupled into an optical fiber within an active HDMI cable and transmitted to an HDMI receiver (sink). The TMDS CLK signal is not included in this conversion into the optical domain, but remains as a separate electrical signal to be transmitted along a copper signal path within the active HDMI cable.

摘要翻译： 呈现HDMI互连布置，其执行TMDS音频/视频信号的脉冲幅度调制（PAM）转换，以便通过单根光纤同时传输所有三个通道。 三组音频/视频TMDS通道的组合被用作PAM-8光调制器的输入，PAM-8光调制器用于将三个通道的组合编码到光调制的输出信号上。 调制的光信号此后耦合到有源HDMI电缆中的光纤中，并被传输到HDMI接收器（接收器）。 TMDS CLK信号不包含在该转换到光学域中，而是作为单独的电信号保持在有源HDMI电缆内的铜信号路径上传输。

公开(公告)号：US07187837B2

公开(公告)日：2007-03-06

申请号：US11069852

申请日：2005-02-28

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G02B6/26 ,  G02B6/10 ,  H01L29/22 ,  H01L33/00 ,  H01L27/14 ,  H01L31/00

CPC分类号： G02B6/12004 ,  G02F1/025 ,  G02F1/292 ,  G02F2001/294

摘要： An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.) so as to form an active, tunable element.

摘要翻译： 用于主动地控制SOI基光学结构内的光的操纵的布置利用形成在SOI层内的掺杂区域和硅绝缘体 - 硅电容（SISCAP）结构的多晶硅层。 这些区域相反地掺杂以形成有源器件，其中在相对掺杂区域之间施加电压电位用于改变受影响区域中的折射率并改变传播通过该区域的光信号的特性。 可以有利地形成掺杂区域以呈现任何期望的“成形”（例如，透镜，棱镜，布拉格光栅等），以便根据这些器件的已知特性来操纵传播光束。 本发明的一个或多个有源器件可以包括在形成SISCAP的SOI基光学元件（例如，诸如Mach-Zehnder干涉仪，环形谐振器，光学开关等）中，以形成活跃的 ，可调元素。

公开(公告)号：US07020364B2

公开(公告)日：2006-03-28

申请号：US10668947

申请日：2003-09-23

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/34

CPC分类号： G02B6/4206

摘要： A trapezoidal shaped single-crystal silicon prism is formed and permanently attached to an SOI wafer, or any structure including a silicon optical waveguide. In order to provide efficient optical coupling, the dopant species and concentration within the silicon waveguide is chosen such that the refractive index of the silicon waveguide is slightly less than that of the prism coupler (refractive index of silicon≈3.5). An intermediate evanescent coupling layer, disposed between the waveguide and the prism coupler, comprises a refractive index less than both the prism and the waveguide. In one embodiment, the evanescent coupling layer comprises a constant thickness. In an alternative embodiment, the evanescent coupling layer may be tapered to improve coupling efficiency between the prism and the waveguide. Methods of making the coupling arrangement are also disclosed.

摘要翻译： 形成梯形形状的单晶硅棱镜，并且永久地附着到SOI晶片或包括硅光波导的任何结构。 为了提供有效的光耦合，选择硅波导内的掺杂物种类和浓度使得硅波导的折射率略小于棱镜耦合器的折射率（硅折射率为0.35）。 设置在波导和棱镜耦合器之间的中间消逝耦合层包括小于棱镜和波导两者的折射率。 在一个实施例中，ev逝耦合层包括恒定的厚度。 在替代实施例中，渐逝耦合层可以是锥形的，以提高棱镜和波导之间的耦合效率。 还公开了制造耦合装置的方法。

公开(公告)号：US07013067B2

公开(公告)日：2006-03-14

申请号：US11054205

申请日：2005-02-09

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/26

CPC分类号： G02B6/1228 ,  G02B6/4204

摘要： An arrangement for coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer (SOI layer) of a silicon-an-insulator (SOI) structure includes a silicon nanotaper structure formed in the (SOI layer) and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer is disposed so as to overly a portion of a dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space signal and the ultrathin silicon waveguide. A free-space optical coupling arrangement is disposed over the dielectric waveguide coupling layer and used to couple between free space and the dielectric waveguide coupling layer and thereafter into the ultrathin silicon waveguide.

摘要翻译： 在自由空间传播的光信号和形成于硅 - 绝缘体（SOI））结构的上硅层（SOI层）中的超薄硅波导之间的耦合的布置包括在（SOI层）中形成的硅纳米锥结构， 并耦合到超薄硅波导。 电介质波导耦合层设置成在去除了SOI层的相关部分的区域中的绝缘层的一部分上。 电介质波导耦合层的端部设置成与硅纳米锥的端部部分重叠以在自由空间信号和超薄硅波导之间形成模式转换区域。 自由空间光耦合装置设置在电介质波导耦合层上，用于将自由空间与电介质波导耦合层之间耦合，此后进入超薄硅波导。

公开(公告)号：US07000207B2

公开(公告)日：2006-02-14

申请号：US10820356

申请日：2004-04-08

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A system and method for providing the layout of non-Manhattan shaped integrated circuit elements using a Manhattan layout system utilizes a plurality of minimal sized polygons (e.g., rectangles) to fit within the boundaries of the non-Manhattan element. The rectangles are fit such that at least one vertex of each rectangle coincides with a grid point on the Manhattan layout system. Preferably, the rectangles are defined by using the spacing being adjacent grid points as the height of each rectangle. As the distance between adjacent grid points decreases, the layout better matches the actual shape of the non-Manhattan element. The system and method then allows for electrical and optical circuit elements to be laid out simultaneously, using the same layout software and equipment.

摘要翻译： 使用曼哈顿布局系统提供非曼哈顿形集成电路元件的布局的系统和方法利用多个最小尺寸的多边形（例如，矩形）来装配在非曼哈顿元件的边界内。 矩形被配合成使得每个矩形的至少一个顶点与曼哈顿布局系统上的网格点重合。 优选地，通过使用相邻网格点的间隔作为每个矩形的高度来定义矩形。 随着相邻网格点之间的距离减小，布局更好地匹配非曼哈顿元素的实际形状。 然后，系统和方法可以使用相同的布局软件和设备同时布置电气和光学电路元件。

公开(公告)号：US06980720B2

公开(公告)日：2005-12-27

申请号：US10818415

申请日：2004-04-05

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G02B6/12 ,  G02B6/122 ,  G02B6/26 ,  G02B6/32

CPC分类号： G02B6/1228 ,  G02B2006/12097

摘要： A low loss coupling arrangement between a slab/strip waveguide and a rib waveguide in an optical waveguiding structure formed on a silicon-on-insulator (SOI) platform utilizes tapered sections at the input and/or output of the rib waveguide to reduce loss. Optical reflections are reduced by using silicon tapers (either vertical tapers, horizontal tapers, or two-dimensional tapers) that gradually transition the effective index seen by an optical signal propagating along the slab/strip waveguide and subsequently into and out of the rib waveguide. Loss can be further reduced by using adiabatically contoured silicon regions at the input and output of the rib waveguide to reduce mode mismatch between the slab/strip waveguide and rib waveguide. In a preferred embodiment, concatenated tapered and adiabatic sections can be used to provide for reduced optical reflection loss and reduced optical mode mismatch.

摘要翻译： 形成在绝缘体上硅（SOI）平台上的光波导结构中的板/条波导和肋波导之间的低损耗耦合布置在肋波导的输入和/或输出处利用锥形部分来减少损耗。 通过使用沿着板/条波导传播的随后进入和离开肋波导的光信号逐渐转变的有效折射率的硅锥（垂直锥度，水平锥度或二维锥度）来减少光学反射。 通过在肋波导的输入和输出处使用绝热的轮廓的硅区域来减少损耗，以减少板/波导管和肋波导之间的模式失配。 在优选实施例中，级联的锥形和绝热部分可用于提供减少的光学反射损失和减小的光学模式失配。

公开(公告)号：US20050236619A1

公开(公告)日：2005-10-27

申请号：US11169932

申请日：2005-06-29

申请人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

发明人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

IPC分类号： H01L27/12 ,  H01L27/144 ,  H01L29/04

CPC分类号： H01L27/1443 ,  H01L27/1203

摘要： A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.