Wafer-level opto-electronic testing apparatus and method
    1.
    发明申请
    Wafer-level opto-electronic testing apparatus and method 有权
    晶圆级光电测试仪器及方法

    公开(公告)号:US20050194990A1

    公开(公告)日:2005-09-08

    申请号:US11075430

    申请日:2005-03-08

    IPC分类号: G01R31/26

    摘要: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

    摘要翻译: 用于在绝缘体上硅(SOI)晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上,并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件(例如,棱镜耦合器,光栅)之间的耦合。 此后,光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚,其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示,并因此作为电信号返回到测试元件。

    Active manipulation of light in a silicon-on-insulator (SOI) structure
    2.
    发明申请
    Active manipulation of light in a silicon-on-insulator (SOI) structure 有权
    主动操纵绝缘体上硅(SOI)结构中的光

    公开(公告)号:US20050189591A1

    公开(公告)日:2005-09-01

    申请号:US11069852

    申请日:2005-02-28

    IPC分类号: G02B6/12 H01L27/15

    摘要: An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.) so as to form an active, tunable element.

    摘要翻译: 用于主动地控制SOI基光学结构内的光的操纵的布置利用形成在SOI层内的掺杂区域和硅绝缘体 - 硅电容(SISCAP)结构的多晶硅层。 这些区域相反地掺杂以形成有源器件,其中在相对掺杂区域之间施加电压电位用于改变受影响区域中的折射率并改变传播通过该区域的光信号的特性。 可以有利地形成掺杂区域以呈现任何期望的“成形”(例如,透镜,棱镜,布拉格光栅等),以便根据这些器件的已知特性来操纵传播光束。 本发明的一个或多个有源器件可以包括在形成SISCAP的SOI基光学元件(例如,诸如Mach-Zehnder干涉仪,环形谐振器,光学开关等)中,以形成活跃的 ,可调元素。

    EMI-EMC shield for silicon-based optical transceiver
    3.
    发明申请
    EMI-EMC shield for silicon-based optical transceiver 审中-公开
    用于硅基光收发器的EMI-EMC屏蔽

    公开(公告)号:US20050135727A1

    公开(公告)日:2005-06-23

    申请号:US11013722

    申请日:2004-12-16

    IPC分类号: G02B6/42 G02B6/12

    摘要: An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.

    摘要翻译: 基于SOI的光电结构包括在单个SOI层内与其相关联的光学部件一起设置的各种电子部件,形成单片布置。 通过在与SOI层相接的外部棱镜耦合器的表面上形成金属化的外层来提供EMI / EMC屏蔽,金属化层包括透明的孔,以允许光信号耦合到SOI层中。 棱镜耦合器的相对表面也可以用金属材料涂覆以提供额外的屏蔽。 此外,金属屏蔽板可以形成在SOI结构本身上,覆盖EMI敏感电子器件的位置。 所有这些金属层最终被耦合到外部接地平面以隔离结构并提供必要的屏蔽。

    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure
    4.
    发明申请
    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure 失效
    薄硅隔离器(SOI)结构中的平面波导光隔离器

    公开(公告)号:US20050123232A1

    公开(公告)日:2005-06-09

    申请号:US11005286

    申请日:2004-12-06

    摘要: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved—advantageously within a monolithic arrangement.

    摘要翻译: 在SOI结构的硅表面层内形成平面光隔离器。 正向信号被施加到隔离器的输入波导部分,然后通过非互易波导耦合区域传播到输出波导部分中。 后向信号经由输出波导部分进入,然后耦合到不可逆波导结构中,其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。 在一个实施例中,非互易结构包括N路定向耦合器(具有一个输出波导,一个输入波导和N-1个隔离波导)。 在另一个实施例中,不可逆结构包括波导扩展区域,其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分,使得反射信号的大部分将 相对于输入波导部分不匹配。 通过级联多个这种平面的基于SOI的结构,可以实现增加的隔离 - 有利地在单片布置中。

    Interfacing multiple wavelength sources to thin optical waveguides utilizing evanescent coupling
    5.
    发明申请
    Interfacing multiple wavelength sources to thin optical waveguides utilizing evanescent coupling 有权
    使用ev逝耦合将多个波长源连接到薄光波导上

    公开(公告)号:US20050094939A1

    公开(公告)日:2005-05-05

    申请号:US10935146

    申请日:2004-09-07

    IPC分类号: G02B20060101 G02B6/34

    摘要: An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index “seen” by the multi-wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the “prism coupling surface”). The period and/or duty cycle of the grating can be controlled to modify the effective refractive index profile in the direction away from the coupling region so as to reduce the effective refractive index from the relatively high value useful in multi-wavelength coupling to the lower value associated with maintaining confinement of the optical signals within the surface waveguide structure, thus reducing reflections along the transition region.

    摘要翻译: 用于实现和维持多波长光信号和较薄(例如亚微米)硅光波导之间的高效率耦合的布置使用与渐逝耦合层相关联的棱镜耦合器。 在耦合区域(形成在硅波导,ev逝耦合层,棱镜耦合器或其任何组合中)形成具有小于透射波长的周期的光栅结构,以便通过“看到”来提高有效折射率 离开/进入棱镜耦合器的光束截取波导表面(称为“棱镜耦合表面”)的区域中的多波长光信号。 可以控制光栅的周期和/或占空比以在远离耦合区域的方向上改变有效折射率分布,以便将有效折射率从在多波长耦合中的有用折射率降低到较低的值 与保持表面波导结构内的光信号的限制相关联的值,从而减少沿着过渡区域的反射。

    Silicon nanotaper couplers and mode-matching devices
    9.
    发明申请
    Silicon nanotaper couplers and mode-matching devices 有权
    硅纳米器耦合器和模式匹配器件

    公开(公告)号:US20050201683A1

    公开(公告)日:2005-09-15

    申请号:US11054205

    申请日:2005-02-09

    CPC分类号: G02B6/1228 G02B6/4204

    摘要: An arrangement for providing optical coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer of a silicon-on-insulator (SOI) structure includes a silicon nanotaper structure formed in the upper silicon layer (SOI layer) of the SOI structure and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer, with a refractive index greater than the index of the dielectric insulating layer but less than the refractive index of silicon, is disposed so as to overly a portion of the dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space propagating optical signal and the ultrathin silicon waveguide. A free-space optical coupling arrangement (such as a prism or grating) is disposed over the dielectric waveguide coupling layer and used to couple a propagating optical signal between free space and the dielectric waveguide coupling layer and thereafter into the ultrathin silicon waveguide.

    摘要翻译: 用于在自由空间传播的光信号和形成在绝缘体上硅(SOI))结构的上硅层中的超薄硅波导之间提供光耦合的装置包括形成在上硅层(SOI层)中的硅纳米锥结构 )和耦合到超薄硅波导。 具有大于介电绝缘层的折射率但小于硅的折射率的折射率的介质波导耦合层被布置成过度地在介电绝缘层的一部分中的相关部分 SOI层已被去除。 电介质波导耦合层的端部设置成与硅纳米锥的端部部分重叠以在自由空间传播的光信号和超薄硅波导之间形成模式转换区域。 自由空间光耦合装置(诸如棱镜或光栅)设置在介质波导耦合层之上,用于将传播的光信号耦合在自由空间与介质波导耦合层之间,然后耦合到超薄硅波导中。

    SOI-based photonic bandgap devices
    10.
    发明申请
    SOI-based photonic bandgap devices 有权
    基于SOI的光子带隙器件

    公开(公告)号:US20050179986A1

    公开(公告)日:2005-08-18

    申请号:US11042774

    申请日:2005-01-24

    IPC分类号: G02B26/00 G02F1/00 G02F1/025

    CPC分类号: G02F1/025 G02F2202/32

    摘要: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

    摘要翻译: 基于SOI的光子带隙(PBG)电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束,从而显着减少光学损耗。 通过包括PBG结构,相关联的电触点可以放置在更接近有源区域而不影响光学性能,从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制,整个装置尺寸,电容和电阻也减小。