公开(公告)号：US07263541B2

公开(公告)日：2007-08-28

申请号：US10610336

申请日：2003-06-30

Applicant: Kameran Azadet

Inventor： Kameran Azadet

IPC: G06F17/10

CPC classification number: H03H17/06 ,  H03F1/32 ,  H03H2017/0692 ,  H03H2218/06

Abstract: Multi-dimensional finite impulse response filters are disclosed in hybrid and transpose forms. Multi-dimensional signals can be expressed in a vector (or matrix) form to allow multi-dimensional signals to be processed collectively. Known hybrid and transpose FIR filters are extended to the multi-dimensional case to allow multi-dimensional signals to be processed with reduced redundancies. The input signals are vectors with multidimensional components. The disclosed FIR filters include multipliers that perform matrix multiplications with multiple coefficients, and adders for performing vector additions with multiple inputs and outputs. The z-transforms are provided for the disclosed hybrid and transpose multi-dimensional FIR filters.

Abstract translation: 多维有限脉冲响应滤波器以混合和转置形式公开。 多维信号可以以向量（或矩阵）形式表示，以允许集体处理多维信号。 已知的混合和转置FIR滤波器被扩展到多维情况，以允许以减少的冗余来处理多维信号。 输入信号是具有多维分量的向量。 所公开的FIR滤波器包括执行具有多个系数的矩阵乘法的乘法器和用于执行具有多个输入和输出的矢量加法的加法器。 为所公开的混合和转置多维FIR滤波器提供z变换。

公开(公告)号：US07085794B2

公开(公告)日：2006-08-01

申请号：US10122997

申请日：2002-04-12

Applicant: Kameran Azadet ,  Meng-Lin Yu ,  Zhan Yu

Inventor： Kameran Azadet ,  Meng-Lin Yu ,  Zhan Yu

IPC: G06F7/38 ,  G06F17/10

CPC classification number: G06F7/5443 ,  G06F7/49994 ,  H03H17/0233 ,  H03H17/06

Abstract: An arrangement is provided for using 2's complement arithmetic without the high switching activity of the prior art. In particular, the invention operates to exploit the sign-extension property of a 2's complement number. A reduced representation for 2's complement numbers is provided to avoid sign-extension and the switching of sign-extension bits. The maximum magnitude of a 2's complement number is detected and its reduced representation is dynamically generated to represent the signal. A constant error introduced by the reduced representation is also dynamically compensated.

公开(公告)号：US06771198B2

公开(公告)日：2004-08-03

申请号：US10106990

申请日：2002-03-25

Applicant: Kameran Azadet

Inventor： Kameran Azadet

IPC: H03M100

CPC classification number: H03M3/50 ,  H03M1/12 ,  H03M1/121 ,  H03M1/662 ,  H03M3/468

Abstract: A method and apparatus are disclosed for converting a signal between the analog and digital domains using frequency interleaving. The disclosed frequency interleaving techniques can be similarly applied to convert analog signals to the digital domain or vice-versa. An analog-to-digital converter decomposes the input broadband signal into N frequency bands that are separately sampled (quantized) before a Fourier transform is applied to convert the signal into the digital domain. Each of the frequency bands can be sampled in the corresponding narrow passband using narrow-band converters, such as passband Sigma-Delta converters, or can be returned to baseband prior to sampling. The various analog samples are then converted to the digital domain using an inverse Fourier transform, or another combining technique. Both sampling and analog-to-digital conversion can be performed at a speed that is N times slower than the input frequency. The disclosed frequency interleaving technique decomposes the input signal into frequency bands that are digitized separately at a slower rate. A disclosed calibration scheme corrects for phase and gain mismatches.

Abstract translation: 公开了一种用于使用频率交织来在模拟和数字域之间转换信号的方法和装置。 公开的频率交织技术可以类似地应用于将模拟信号转换成数字域，反之亦然。 模数转换器将输入宽带信号分解为在应用傅里叶变换以将信号转换成数字域之前被单独采样（量化）的N个频带。 可以使用诸如通带Σ-Δ转换器之类的窄带转换器在相应的窄通带中对每个频带进行采样，或者可以在采样之前返回到基带。 然后，使用傅立叶逆变换或其他组合技术将各种模拟样本转换为数字域。 采样和模数转换都可以以比输入频率慢N倍的速度进行。 所公开的频率交织技术将输入信号分解成以较慢速率单独数字化的频带。 公开的校准方案校正相位和增益失配。

公开(公告)号：US09223752B2

公开(公告)日：2015-12-29

申请号：US12324934

申请日：2008-11-28

Applicant: Kameran Azadet ,  Jian-Guo Chen ,  Samer Hijazi ,  Joseph Williams

Inventor： Kameran Azadet ,  Jian-Guo Chen ,  Samer Hijazi ,  Joseph Williams

IPC: G06F17/17 ,  G06F17/10 ,  G06F1/035 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F17/10 ,  G06F1/035 ,  G06F9/3001 ,  G06F9/383

Abstract: A digital signal processor and method are disclosed with one or more non-linear functions using factorized polynomial interpolation. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values from at least one look-up table for said non-linear function that are near said value, x; and interpolating said two or more obtained values to obtain a value, y, using a factorized polynomial interpolation.

Abstract translation: 公开了使用因式分解多项式插值的一个或多个非线性函数的数字信号处理器和方法。 数字信号处理器通过从接近所述值x的所述非线性函数的至少一个查找表中获得两个或更多个值来评估值x的非线性函数; 并且使用因式分解多项式插值来内插所述两个或更多个获得的值以获得值y。

公开(公告)号：US09100228B2

公开(公告)日：2015-08-04

申请号：US12907435

申请日：2010-10-19

Applicant: Samer Hijazi ,  Kameran Azadet ,  Meng-Lin Yu ,  Joseph Othmer ,  Ramon Sanchez Perez

Inventor： Samer Hijazi ,  Kameran Azadet ,  Meng-Lin Yu ,  Joseph Othmer ,  Ramon Sanchez Perez

IPC: H04B17/00 ,  H04L25/02

CPC classification number: H04L25/0232 ,  H04L25/0212 ,  H04L25/0226

Abstract: A method and system for canonical channel estimation in the Long Term Evolution uplink where a multi-frequency signal is generated and then converted to frequency spectrum which is then convolved in the frequency domain with a truncated window function to obtain a time domain channel impulse response. The time domain channel impulse response can be then transformed to a frequency domain to produce a down sampled user channel response, which can be then linearly interpolated to provide a channel estimate for a plurality of subcarriers. Such an approach achieves channel estimation within Long Term Evolution at only canonical locations to reduce complexity without loss in channel entropy.

Abstract translation: 一种用于在长期演进上行链路中进行规范信道估计的方法和系统，其中生成多频信号，然后将其转换为频谱，然后将频谱卷积在具有截断窗函数的频域中以获得时域信道脉冲响应。 然后可以将时域信道脉冲响应变换到频域以产生下采样的用户信道响应，然后可以对其进行线性内插以提供多个子载波的信道估计。 这种方法在长期演进中仅在规范位置实现信道估计，以减少复杂度而不损失信道熵。

公开(公告)号：US08633842B2

公开(公告)日：2014-01-21

申请号：US13254397

申请日：2009-03-31

Applicant: Kameran Azadet ,  Samer Hijazi ,  Joseph H. Othmer

Inventor： Kameran Azadet ,  Samer Hijazi ,  Joseph H. Othmer

IPC: H03M3/00

CPC classification number: H03M7/3042 ,  H03M7/3024

Abstract: Methods and apparatus are provided for direct synthesis of RF signals using a delta-sigma modulator. An RF signal is synthesized from an input signal by quantizing the input signal using a quantizer, such as a one bit quantizer; determining a quantization error associated with the quantizer; generating an error prediction value using an error predictive filter, wherein the error predictive filter comprises one or more filter zeroes on a unit circle for one or more desired frequencies of f1, f2, . . . fn and one or more filter poles having a magnitude inside the unit circle and a frequency substantially equal to the one or more desired frequencies of f1, f2, . . . fn; and subtracting the error prediction value from the input signal. The filter poles have a magnitude that reduces a boost provided out-of-band.

Abstract translation: 提供了使用Δ-Σ调制器直接合成RF信号的方法和装置。 通过使用诸如一位量化器的量化器量化输入信号，从输入信号合成RF信号; 确定与所述量化器相关联的量化误差; 使用误差预测滤波器生成误差预测值，其中所述误差预测滤波器包括在f1，f2的一个或多个期望频率的单位圆上的一个或多个滤波器零点。 。 。 fn和一个或多个具有在单位圆内的幅度的滤波器极，并且频率基本上等于f1，f2的一个或多个期望频率。 。 。 fn 并从输入信号中减去误差预测值。 滤波器极具有降低带外提升的幅度。

公开(公告)号：US20130028342A1

公开(公告)日：2013-01-31

申请号：US13617229

申请日：2012-09-14

Applicant: Kameran Azadet ,  Samer Hijazi ,  Sunitha Kopparthi ,  Albert Molina ,  Ramon Sanchez

Inventor： Kameran Azadet ,  Samer Hijazi ,  Sunitha Kopparthi ,  Albert Molina ,  Ramon Sanchez

IPC: H04B7/08

CPC classification number: H04L25/0202 ,  H04L1/0631 ,  H04L1/20 ,  H04L5/0023 ,  H04L5/0048 ,  H04L25/0204 ,  H04L25/021 ,  H04L25/022 ,  H04L25/023 ,  H04L25/025

Abstract: In one embodiment, a receiver is provided for use in a multiple-input system that includes a receiving antenna receiving a time-domain signal corresponding to a plurality of signals transmitted from a plurality of transmitting antennas. The receiver includes: (a) a transform unit adapted to transform the time-domain signal into a frequency-domain signal; (b) a channel estimation unit adapted to estimate, based on the frequency-domain signal and a frequency-domain pilot signal, a combined transfer function corresponding to a plurality of transfer functions of respective channels between the plurality of transmitting antennas and the receiving antenna; and (c) a channel separation unit including a plurality of frequency-domain convolution units that separate the combined transfer function into a plurality of estimated channel transfer functions.

Abstract translation: 在一个实施例中，提供接收机用于多输入系统，该多输入系统包括接收天线，其接收与从多个发射天线发射的多个信号相对应的时域信号。 接收机包括：（a）适于将时域信号变换为频域信号的变换单元; （b）信道估计单元，适于基于频域信号和频域导频信号估计与多个发射天线和接收天线之间的各个信道的多个传递函数相对应的组合传递函数 ; 以及（c）信道分离单元，其包括将所述组合传递函数分离成多个估计信道传递函数的多个频域卷积单元。

公开(公告)号：US08189704B2

公开(公告)日：2012-05-29

申请号：US12359778

申请日：2009-01-26

Applicant: Kameran Azadet ,  Erich Franz Haratsch

Inventor： Kameran Azadet ,  Erich Franz Haratsch

IPC: H04L5/12

CPC classification number: H04L25/4923 ,  H04L25/03229 ,  H04L2025/03363

Abstract: A method and apparatus are provided for joint equalization and decoding of multilevel codes, such as the Multilevel Threshold-3 (MLT-3) code, which are transmitted over dispersive channels. The MLT-3 code is treated as a code generated by a finite-state machine using a trellis having state dependencies between the various states. A super trellis concatenates the MLT-3 trellis with a trellis representation of the channel. Joint equalization and decoding of the received signal can be performed using the super trellis. A sequence detector is disclosed that uses the super trellis or a corresponding reduced-state trellis to perform joint equalization and decoding of the received signal to decode the MLT-3 coded data bits. The sequence detector may be embodied using maximum likelihood sequence estimation that applies the optimum Viterbi algorithm or a reduced complexity sequence estimation method, such as the reduced-state sequence estimation (RSSE) algorithm.

Abstract translation: 提供了一种用于联合均衡和解码多级代码的方法和装置，例如在色散通道上传输的多级阈值-3（MLT-3）码。 MLT-3代码被视为由有限状态机使用在各种状态之间具有状态依赖性的网格生成的代码。 超级网格将MLT-3网格与网络格式的通道连接起来。 接收信号的联合均衡和解码可以使用超级格子进行。 公开了一种序列检测器，其使用超级格或相应的缩减状态网格来对接收到的信号进行联合均衡和解码，以解码MLT-3编码的数据位。 可以使用应用最优维特比算法或缩减复杂度序列估计方法（例如缩减状态序列估计（RSSE）算法）的最大似然序列估计来体现序列检测器。

公开(公告)号：US08121062B2

公开(公告)日：2012-02-21

申请号：US12020722

申请日：2008-01-28

Applicant: Kameran Azadet

Inventor： Kameran Azadet

IPC: H04B5/16

CPC classification number: H04J1/12 ,  H04J14/0298 ,  H04L5/06

Abstract: A method and apparatus are disclosed for canceling cross-talk in a frequency-division multiplexed communication system. The disclosed frequency-division multiplexed communication system employs multiple carriers having overlapping channels and provides an improved cross-talk cancellation mechanism to address the resulting interference. Bandwidth compression is achieved using n level amplitude modulation in each frequency band. An FDM receiver is also disclosed that decomposes the received broadband signal into each of its respective frequency bands and returns the signal to basehand in the analog domain. Analog requirements are relaxed by removing cross-talk from adjacent R-F channels, from image bands, and minimizing the performance degradation caused by In-phase and Quadrature-phase (I/Q) phase and gain mismatches in modulators and demodulators. The disclosed transmitter or receiver (or both) can be fabricated on a single integrated circuit.

Abstract translation: 公开了用于在频分复用通信系统中消除串扰的方法和装置。 所公开的频分复用通信系统采用具有重叠信道的多个载波，并且提供改进的串扰消除机制来解决所产生的干扰。 在每个频带中使用n级幅度调制实现带宽压缩。 还公开了一种FDM接收机，其将接收到的宽带信号分解成其各个频带的每一个，并将信号在模拟域中返回到原始信号。 通过从图像频带中消除相邻R-F信道的串扰，并将调制器和解调器中的同相和正交相（I / Q）相位和增益失配引起的性能下降最小化，从而放宽模拟需求。 公开的发射器或接收器（或两者）可以在单个集成电路上制造。

公开(公告)号：US07868798B2

公开(公告)日：2011-01-11

申请号：US12414999

申请日：2009-03-31

Applicant: Kameran Azadet ,  Samer Hijazi ,  Joseph H. Othmer

Inventor： Kameran Azadet ,  Samer Hijazi ,  Joseph H. Othmer

IPC: H03M1/20

CPC classification number: H03M7/3008 ,  H03M7/3028 ,  H03M7/3042

Abstract: Methods and apparatus are provided for whitening quantization noise in a delta-sigma modulator using a dither signal. An input signal is quantized using a predictive delta-sigma modulator by quantizing the input signal using a quantizer; adding a dither signal at a first location of the predictive delta-sigma modulator; determining a quantization error associated with the quantizer; removing the dither signal at a second location of the predictive delta-sigma modulator (for example, by subtracting a substantially similar version of the dither signal at the second location); generating an error prediction value using an error predictive filter; and subtracting the error prediction value from the input signal. The dither signal may be a white noise signal and may optionally be generated using a pseudo-random number generator.

Abstract translation: 提供了使用抖动信号在Δ-Σ调制器中增白量化噪声的方法和装置。 使用量化器对输入信号进行量化，使用预测Δ-Σ调制器对输入信号进行量化; 在预测Δ-Σ调制器的第一位置添加抖动信号; 确定与所述量化器相关联的量化误差; 在预测Δ-Σ调制器的第二位置处去除抖动信号（例如，通过减去第二位置处的抖动信号的基本相似的版本）; 使用误差预测滤波器生成误差预测值; 并从输入信号中减去误差预测值。 抖动信号可以是白噪声信号，并且可以可选地使用伪随机数发生器来产生。