公开(公告)号：US06816409B2

公开(公告)日：2004-11-09

申请号：US10654674

申请日：2003-09-03

申请人： Hidehiko Tanaka

发明人： Hidehiko Tanaka

IPC分类号： G11C1604

CPC分类号： G11C16/3431 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3404 ,  G11C16/3418

摘要： A non-volatile semiconductor memory device is provided, which comprises a memory array comprising memory cells, in which each memory cell is capable of storing data values depending on the voltages thereof, the data values include a first data value corresponding to a first voltage range and a second data value corresponding to a second voltage range, and the first data is written in a memory cell of the memory cells, a determination section for determining whether a voltage value of the memory cell is higher or lower than a reference value set between a maximum value and a minimum value of the first voltage range, and a rewrite section for rewriting the first data into the memory cell based on a determination result of the determination section so that a margin between the first voltage range and the second voltage range in the memory cell is enlarged.

摘要翻译： 提供了一种非易失性半导体存储器件，其包括存储器阵列，其包括存储器单元，其中每个存储器单元能够存储取决于其电压的数据值，数据值包括对应于第一电压范围的第一数据值 以及与第二电压范围相对应的第二数据值，并且将第一数据写入存储单元的存储单元;确定部，用于确定存储单元的电压值是否高于或低于 第一电压范围的最大值和最小值;以及重写部分，用于基于确定部分的确定结果将第一数据重写到存储器单元中，使得第一电压范围和第二电压范围之间的裕度 存储单元被放大。

公开(公告)号：US06632358B1

公开(公告)日：2003-10-14

申请号：US09601072

申请日：2000-08-24

申请人： Nobuhiko Suga ,  Hidehiko Tanaka

发明人： Nobuhiko Suga ,  Hidehiko Tanaka

IPC分类号： B01D6304

CPC分类号： B01D63/043 ,  B01D63/021 ,  B01D63/024 ,  B01D65/08 ,  B01D2313/44 ,  B01D2321/185 ,  B01D2321/2058

摘要： A hollow fiber membrane cartridge comprises a bundle of a plurality of hollow fiber membranes, both ends of which are fixed by adhesion, a cartridge head fixed at the periphery of the bundle at one end so as not to permit the passage of liquid either in or out, and a bottom ring fixed at the periphery of the bundle at the other end so as not to permit the passage of liquid either in or out, wherein the cartridge head and the bottom ring are not connected and fixed but are separated, the hollow portion at the end of each hollow fiber membrane on the cartridge head side is open, the hollow portion at the end of each hollow fiber membrane on the bottom ring side is sealed, and a plurality of through-holes are provided in an adhesion and fixation layer on the bottom ring side.

摘要翻译： 中空纤维膜盒包括多个中空纤维膜束，其两端通过粘合固定，一个固定在束的周边的盒头在一端不允许液体进入或 并且在另一端处固定在束的周边处的底环，以便不允许液体进入或流出，其中盒头部和底部环未被连接和固定但是分开，所以中空 位于盒头侧的各中空纤维膜的端部的部分开口，底环侧的各中空纤维膜的端部处的中空部被密封，并且在密封和固定中设置多个通孔 在底环一侧。

公开(公告)号：US6078096A

公开(公告)日：2000-06-20

申请号：US955016

申请日：1997-10-20

申请人： Tatsuya Kimura ,  Hidehiko Tanaka

发明人： Tatsuya Kimura ,  Hidehiko Tanaka

IPC分类号： H01L21/8242 ,  H01L27/02 ,  H01L27/108 ,  H01L23/62 ,  H01L27/118 ,  H01L29/00 ,  H01L29/40

CPC分类号： H01L27/0207 ,  H01L27/10897

摘要： A 16 Mbit DRAM of the invention is made up of a nexus of four 4 Mbit DRAM chips which are formed adjacent to one another on the wafer and each constitute an individual 4 Mbit DRAM, the connection between the 4 Mbit DRAMs is formed through a short-circuit protecting circuit provided within each 4 Mbit DRAM and an interconnection/controller circuit portion formed in the dicing area between the 4 Mbit DRAMs. When the nexus is cut along the dicing area containing the interconnection/controller circuit portion, 4 Mbit DRAM chips and/or 8 Mbit DRAM chips can be produced as desired.

摘要翻译： 本发明的16Mbit DRAM由在晶片上彼此相邻形成的四个4Mbit DRAM芯片的连接构成，并且各自构成单独的4M位DRAM，4Mbit DRAM之间的连接通过短路形成 在每个4Mbit DRAM内设置的电路保护电路和形成在4Mbit DRAM之间的切割区域中的互连/控制器电路部分。 当沿着包含互连/控制器电路部分的切割区切断连接点时，可以根据需要产生4Mbit DRAM芯片和/或8Mbit DRAM芯片。

公开(公告)号：US4888586A

公开(公告)日：1989-12-19

申请号：US498052

申请日：1983-05-25

申请人： Masahiro Ise ,  Hidehiko Tanaka ,  Katsuyuki Machino ,  Toshiyuki Matsubara ,  Teiji Terasaka

发明人： Masahiro Ise ,  Hidehiko Tanaka ,  Katsuyuki Machino ,  Toshiyuki Matsubara ,  Teiji Terasaka

IPC分类号： H03M5/04 ,  H04L1/20 ,  H04L12/40 ,  H04L25/49

CPC分类号： H04L12/413 ,  H04L1/20 ,  H04L12/40

摘要： A very useful data transmission system having a plurality of transmission modules connected to a single cable in a multidrop manner is disclosed herein. The system features its ability to check the transmission state at the level of individual modules through use of a proper code notation (typically, Manchester code). The system detects a specific module with proper signals lasting at the same level for more than a given time, except cable outputs, and treats it as involving a faulty condition and compels the transmission state to a halt, thus preventing only the faulty module or modules from transmitting signals thereby avoiding breakdown of the whole system.

摘要翻译： 本文公开了一种非常有用的数据传输系统，其具有以多点方式连接到单个电缆的多个传输模块。 该系统具有通过使用适当的代码符号（通常为曼彻斯特码）来检查单个模块级别的传输状态的能力。 除了电缆输出外，系统会检测到具有相同电平持续相同电平的特定模块，除了电缆输出外，还将其视为涉及故障状态并强制传输状态停止，从而仅防止故障模块或模块 从发送信号，从而避免整个系统的故障。

公开(公告)号：US4675668A

公开(公告)日：1987-06-23

申请号：US818068

申请日：1986-01-13

申请人： Masahiro Ise ,  Hidehiko Tanaka ,  Katsuyuki Machino ,  Toshiyuki Matsubara ,  Teiji Terasaka

发明人： Masahiro Ise ,  Hidehiko Tanaka ,  Katsuyuki Machino ,  Toshiyuki Matsubara ,  Teiji Terasaka

IPC分类号： H02J13/00 ,  H04B3/54 ,  H04H1/00

CPC分类号： H04B3/542 ,  H02J13/0089 ,  H04B2203/5408 ,  H04B2203/5425 ,  H04B2203/5458 ,  H04B2203/5466 ,  H04B2203/5491 ,  Y02B90/2615 ,  Y02B90/2692 ,  Y04S40/121 ,  Y04S40/146

摘要： A data transmission method over building wiring includes a plurality of transmission sections. One of these sections is selected from the plurality of transmission sections to be a data transmission source machine for providing data. The data is transmitted from the data transmission source to the remaining transmission sections. If a transmission section is not selected it is used to relay the data to one of the remaining transmission sections wherein it is received by a final data transmission section. A data transmission section used in the method, comprises a data receiving part for receiving the transmitted data, a relay counter part for counting the number of relaying the transmitted data, and data relaying part for steps of relaying the-received data.

摘要翻译： 建筑物布线的数据传输方法包括多个传输部分。 从多个发送部中选择这些部分之一作为用于提供数据的数据发送源机器。 数据从数据传输源发送到剩余的传输部分。 如果未选择发送部分，则将其用于将数据中继到由最终数据传输部分接收的剩余传输部分之一。 在该方法中使用的数据传输部分包括用于接收所发送的数据的数据接收部分，用于对传送的数据进行中继的次数进行计数的中继计数器部分和用于中继接收数据的步骤的数据中继部分。

公开(公告)号：US4579704A

公开(公告)日：1986-04-01

申请号：US583236

申请日：1984-02-24

申请人： Hidehiko Tanaka ,  Yoshizo Inomata ,  Hitoshi Tsukuda

发明人： Hidehiko Tanaka ,  Yoshizo Inomata ,  Hitoshi Tsukuda

IPC分类号： C04B35/565 ,  C04B35/56

CPC分类号： C04B35/565

摘要： A process for sintering cubic system silicon carbide powder, which comprises compacting a mixture of cubic system silicon carbide powder with more than 1% by weight and not more than 3% by weight of carbon and at least 0.10% by weight and less than 0.3% by weight of boron and sintering the compact thereby obtained, under vacuum or in a chemically inert atmosphere at a temperature of from 1,900.degree. to 2,200.degree. C.

摘要翻译： 一种用于烧结立方体碳化硅粉末的方法，其包括将立方体系碳化硅粉末的混合物压制成超过1重量％且不超过3重量％的碳和至少0.10重量％且小于0.3重量％ 的硼，并在真空下或在化学惰性气氛中在1900至2200℃的温度下烧结由此获得的压块。

公开(公告)号：US4517548A

公开(公告)日：1985-05-14

申请号：US451019

申请日：1982-12-20

申请人： Masahiro Ise ,  Katsuyuki Machino ,  Hidehiko Tanaka ,  Toshiyuki Matsubara

发明人： Masahiro Ise ,  Katsuyuki Machino ,  Hidehiko Tanaka ,  Toshiyuki Matsubara

IPC分类号： H04B3/54

CPC分类号： H04B3/54 ,  H04B2203/5425 ,  H04B2203/5458 ,  H04B2203/5483 ,  H04B2203/5491

摘要： A system transmits and receives control signals for various types of indoor devices using the existing power wiring in houses and buildings. The transmitter section of the power wiring transmission system is provided with a circuit in which the output of a sine wave oscillator is fed to an emitter-follower through a photocoupler and this output is then fed to the indoor power distribution line through a series resonance circuit after stepping down with a transformer; and the receiving section is provided with a circuit in which the signal from the distribution line is fed to a parallel resonance circuit after passing through a series resonance circuit. Moreover, the input and output sections are resistor terminated.

摘要翻译： 系统使用房屋和建筑物中的现有电力布线来发送和接收各种室内装置的控制信号。 电力线传输系统的发射机部分设置有电路，其中正弦波振荡器的输出通过光电耦合器馈送到发射极跟随器，然后该输出通过串联谐振电路馈送到室内配电线路 用变压器降压后; 并且接收部分设置有电路，其中来自分配线的信号在通过串联谐振电路之后被馈送到并联谐振电路。 此外，输入和输出部分是电阻器端接。

公开(公告)号：US20090169458A1

公开(公告)日：2009-07-02

申请号：US12340084

申请日：2008-12-19

申请人： Hidehiko Tanaka ,  Yoshitaka Aoki

发明人： Hidehiko Tanaka ,  Yoshitaka Aoki

IPC分类号： C01B31/36

CPC分类号： C01B31/36 ,  C01B32/956 ,  C04B35/565 ,  C04B35/571 ,  C04B35/6269 ,  C04B35/6325 ,  C04B2235/3289 ,  C04B2235/3826 ,  C04B2235/483 ,  C04B2235/5436 ,  C04B2235/602 ,  C04B2235/723 ,  C04B2235/79 ,  C04B2235/9661

摘要： A method of producing silicon carbide is provided. The method includes heating a cured product of a curable silicone composition in a non-oxidizing atmosphere at a temperature exceeding 1,500° C. but not more than 2,600° C. The method is capable of producing high-purity silicon carbide simply and at a high degree of productivity, and is capable of simply producing a silicon carbide molded item having a desired shape and dimensions.

摘要翻译： 提供了生产碳化硅的方法。 该方法包括在非氧化性气氛中在超过1500℃但不高于2600℃的温度下加热可固化有机硅组合物的固化产物。该方法能够简单地并且高度地生产高纯度碳化硅 并且能够简单地制造具有所需形状和尺寸的碳化硅模制品。

公开(公告)号：US07058049B2

公开(公告)日：2006-06-06

申请号：US10092989

申请日：2002-03-08

申请人： Hidehiko Tanaka ,  Shuichi Sakai ,  Hidenori Tsuji ,  Yuichiro Ajima

发明人： Hidehiko Tanaka ,  Shuichi Sakai ,  Hidenori Tsuji ,  Yuichiro Ajima

IPC分类号： H04L12/50

CPC分类号： G06F9/3834

摘要： An in-order state queue holds store tags as in-order information about store instructions. A temporal store cache, which uses store addresses as indexes, holds store tags and store values. A first retrieving unit retrieves store tags preceding a load tag. A second retrieving unit compares the store tag read from the temporal store cache according to the address for the load instruction with the store tag from the first retrieving unit and, when they coincide with each other, outputs a hit signal.

公开(公告)号：US06233192B1

公开(公告)日：2001-05-15

申请号：US09263050

申请日：1999-03-05

申请人： Hidehiko Tanaka

发明人： Hidehiko Tanaka

IPC分类号： G11C700

CPC分类号： G11C11/406

摘要： The present invention is to provide a method for designating a memory bank to be refreshed efficiently and a start and termination procedure of a self-refresh. In a dynamic RAM including a plurality of memory banks 200A, 200B, memory access actions being allowed to be independently on the respective memory banks, and a refresh control circuit for allowing the plurality of memory banks 200A, 200B to be refreshed in a lump and for allowing one memory bank 200A or 200B of the plurality of memory banks designated to be refreshed, a semiconductor memory device is configured such that when a row address input terminal or one of specific input terminals other than the row address input terminal is at a high level, the plurality of memory banks are refreshed in a lump; and when the row address input terminal or one of specific input terminals other than the row address input terminal is at a low level, one of the plurality of memory banks is designated to be refreshed in accordance with a bank selecting bit composed of one bit or a combination of a plurality of bits of row addresses other than the row address.

摘要翻译： 本发明是提供一种用于指定要更新的存储器组的方法以及自刷新的开始和结束过程。 在包括多个存储体200A，200B的动态RAM中，允许存储器访问动作被独立地存储在各个存储体上，以及刷新控制电路，用于允许多个存储体200A，200B被一次性地刷新， 为了允许指定要刷新的多个存储体的一个存储体200A或200B，半导体存储器件被配置为使得当行地址输入端子或行地址输入端子以外的特定输入端子中的一个处于高电平 级别，多个存储体被一次刷新; 并且当行地址输入端子或行地址输入端子以外的其中一个特定输入端子处于低电平时，多个存储器组中的一个被指定为根据由一个位组成的存储体选择位刷新 除了行地址之外的行地址的多个位的组合。