摘要:
Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.
摘要:
The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.
摘要:
Disclosed is an integrated circuit structure and a method of making such a structure that has a substrate and P-type and N-type transistors on the substrate. The N-type transistor extension and source/drain regions comprise dopants implanted into the substrate. The P-type transistor extension and source/drain regions partially include a strained epitaxial silicon germanium, wherein the strained silicon germanium comprises of two layers, with a top layer that is closer to the gate stack than the bottom layer. The strained silicon germanium is in-situ doped and creates longitudinal stress on the channel region.
摘要:
The present invention provides a method of fabricating a SiGe-on-insulator substrate in which lattice engineering is employed to decouple the interdependence between SiGe thickness, Ge fraction and strain relaxation. The method includes providing a SiGe-on-insulator substrate material comprising a SiGe alloy layer having a selected in-plane lattice parameter, a selected thickness parameter and a selected Ge content parameter, wherein the selected in-plane lattice parameter has a constant value and one or both of the other parameters, i.e., thickness or Ge content, have adjustable values; and adjusting one or both of the other parameters to final selected values, while maintaining the selected in-plane lattice parameter. The adjusting is achieved utilizing either a thinning process or a thermal dilution process depending on which parameters are fixed and which are adjustable.
摘要:
A method of fabricating a strained semiconductor-on-insulator (SSOI) substrate in which the strained semiconductor is a thin semiconductor layer having a thickness of less than 50 nm that is located directly atop an insulator layer of a preformed silicon-on-insulator substrate is provided. Wafer bonding is not employed in forming the SSOI substrate of the present invention.
摘要:
Structures and methods of manufacturing are disclosed of dislocation free stressed channels in bulk silicon and SOI (silicon on insulator) CMOS (complementary metal oxide semiconductor) devices by gate stress engineering with SiGe and/or Si:C. A CMOS device comprises a substrate of either bulk Si or SOI, a gate dielectric layer over the substrate, and a stacked gate structure of SiGe and/or Si:C having stresses produced at the interfaces of SSi(strained Si)/SiGe or SSi/Si:C in the stacked gate structure. The stacked gate structure has a first stressed film layer of large grain size Si or SiGe over the gate dielectric layer, a second stressed film layer of strained SiGe or strained Si:C over the first stressed film layer, and a semiconductor or conductor such as p(poly)-Si over the second stressed film layer.
摘要:
A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. The devices have a thin channel, e.g., an ultra-thin (smaller than or equal to 10 nanometers (10 nm)) silicon on insulator (SOI) layer. Source/drain regions are located in recesses at either end of the thin channel and are substantially thicker (e.g., 30 nm) than the thin channel. Source/drain extensions and corresponding source/drain regions are self aligned to the FET gate and thin channel.
摘要:
A motor and a rotor thereof are provided. Taking the distance between the two endpoints of a permanent magnet of a motor rotor that are on the side away from the center of an iron core as the length L of the permanent magnet, and the distance between a line connecting the two endpoints of the permanent magnet that are on the side away from the center of the iron core and the center point on the side of the permanent magnet that is close to the centerline of the iron core as the width H of the permanent magnet, then H/L ≧ 1/10. By adjusting the relationship between the length L and width H of the permanent magnet, the air gap magnetic density of the permanent magnet can be effectively increased.
摘要:
A motor rotor includes an iron core and a permanent magnet arranged inside the iron core, wherein, a plurality of groups of mounting grooves are arranged in the iron core in a circumferential direction of the iron core, and each group of mounting grooves comprises two or more than two mounting grooves arranged at intervals in a radial direction of the iron core; and a plurality of groups of permanent magnets are provided, and each permanent magnet in each group of permanent magnets is correspondingly embedded in the corresponding mounting groove of each group of mounting grooves. A motor having the motor rotor is further provided, and the magnetic reluctance torque of the motor rotor is increased, thereby increasing the output torque of the motor and the efficiency of the motor.
摘要:
A motor rotor includes an iron core and permanent magnets provided inside the iron core. The iron core is provided with sets of mounting grooves on the iron core in the peripheral direction of the iron core, each set of mounting grooves having two or more mounting grooves provided intermittently in the radial direction of the iron core. There are sets of permanent magnets, the individual permanent magnet of each set of permanent magnets correspondingly being embedded into the individual mounting grooves of each set of mounting grooves; there is an island region between the outermost layer of mounting grooves and the periphery of the iron core, and an enhancing hole is provided in the island region, an enhancing rod being provided in the enhancing hole. A motor includes a motor stator and the motor rotor, with the motor rotor provided inside the motor stator.