High-quality SGOI by annealing near the alloy melting point
    1.
    发明授权
    High-quality SGOI by annealing near the alloy melting point 失效
    高品质SGOI通过在合金熔点附近退火

    公开(公告)号:US07679141B2

    公开(公告)日:2010-03-16

    申请号:US12027561

    申请日:2008-02-07

    IPC分类号: H01L31/392

    摘要: A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

    摘要翻译: 提供一种形成低缺陷,基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤,并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散,从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外,由于加热步骤在接近最终SiGe合金的熔点的温度下进行,所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中,加热步骤包括氧化过程,其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

    Use of thin SOI to inhibit relaxation of SiGe layers
    2.
    发明授权
    Use of thin SOI to inhibit relaxation of SiGe layers 有权
    使用薄SOI抑制SiGe层的弛豫

    公开(公告)号:US06989058B2

    公开(公告)日:2006-01-24

    申请号:US10654232

    申请日:2003-09-03

    IPC分类号: C30B25/02

    摘要: High-quality, metastable SiGe alloys are formed on SOI substrates having an SOI layer of about 500 Å or less, the SiGe layers can remain substantially fully strained compared to identical SiGe layers formed on thicker SOI substrates and subsequently annealed and/or oxidized at high temperatures. The present invention thus provides a method of ‘frustrating’ metastable strained SiGe layers by growing them on thin, clean and high-quality SOI substrates.

    摘要翻译: 在具有大约等于或小于等于或等于SOI层的SOI层的SOI衬底上形成高质量的亚稳态SiGe合金,与形成在较厚SOI衬底上的相同SiGe层相比,SiGe层可以保持基本上完全变形,并随后在高温下退火和/或氧化 温度。 因此,本发明提供了一种通过在薄的,清洁的和高质量的SOI衬底上生长它们来“挫败”亚稳应变的SiGe层的方法。

    ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SiGe LAYERS
    3.
    发明申请
    ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SiGe LAYERS 有权
    用于抑制退火SiGe层中的缺陷的离子植入

    公开(公告)号:US20100032684A1

    公开(公告)日:2010-02-11

    申请号:US12539248

    申请日:2009-08-11

    摘要: A method for fabricating substantially relaxed SiGe alloy layers with a reduced planar defect density is disclosed The method of the present invention includes forming a strained Ge-containing layer on a surface of a Si-containing substrate; implanting ions at or below the Ge-containing layer/Si-containing substrate interface and heating to form a substantially relaxed SiGe alloy layer that has a reduced planar defect density. A substantially relaxed SiGe-on-insulator substrate material having a SiGe layer with a reduced planar defect density as well as heterostructures containing the same are also provided.

    摘要翻译: 公开了一种制造具有减小的平面缺陷密度的基本上松弛的SiGe合金层的方法。本发明的方法包括在含Si衬底的表面上形成应变的含Ge层; 在含锗层/含Si衬底界面处或下方注入离子,并加热以形成具有减小的平面缺陷密度的基本上松弛的SiGe合金层。 还提供了具有具有减小的平面缺陷密度的SiGe层以及含有该SiGe层的异质结构的基本上松弛的绝缘体上硅衬底材料。

    SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth
    4.
    发明授权
    SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth 有权
    SiGe晶格工程使用氧化,稀化和外延再生长的组合

    公开(公告)号:US07026249B2

    公开(公告)日:2006-04-11

    申请号:US10448954

    申请日:2003-05-30

    IPC分类号: H01L21/302

    摘要: The present invention provides a method of fabricating a SiGe-on-insulator substrate in which lattice engineering is employed to decouple the interdependence between SiGe thickness, Ge fraction and strain relaxation. The method includes providing a SiGe-on-insulator substrate material comprising a SiGe alloy layer having a selected in-plane lattice parameter, a selected thickness parameter and a selected Ge content parameter, wherein the selected in-plane lattice parameter has a constant value and one or both of the other parameters, i.e., thickness or Ge content, have adjustable values; and adjusting one or both of the other parameters to final selected values, while maintaining the selected in-plane lattice parameter. The adjusting is achieved utilizing either a thinning process or a thermal dilution process depending on which parameters are fixed and which are adjustable.

    摘要翻译: 本发明提供了一种制造绝缘体上硅衬底的方法,其中使用晶格工程来去耦合SiGe厚度,Ge分数和应变松弛之间的相互依赖性。 该方法包括提供一种绝缘体上硅衬底材料,其包括具有选定的面内晶格参数的SiGe合金层,选定的厚度参数和所选择的Ge含量参数,其中所选择的面内晶格参数具有恒定值, 一个或两个其他参数,即厚度或Ge含量,具有可调整的值; 并且在保持所选择的平面内晶格参数的同时将其他参数中的一个或两个调整为最终选择的值。 根据哪些参数是固定的,哪些是可调节的,利用稀化过程或热稀释过程实现调节。

    High-quality SGOI by annealing near the alloy melting point
    7.
    发明授权
    High-quality SGOI by annealing near the alloy melting point 有权
    高品质SGOI通过在合金熔点附近退火

    公开(公告)号:US07348253B2

    公开(公告)日:2008-03-25

    申请号:US10855915

    申请日:2004-05-27

    IPC分类号: H01L21/84

    摘要: A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

    摘要翻译: 提供一种形成低缺陷,基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤,并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散,从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外,由于加热步骤在接近最终SiGe合金的熔点的温度下进行,所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中,加热步骤包括氧化过程,其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

    Defect reduction by oxidation of silicon
    8.
    发明授权
    Defect reduction by oxidation of silicon 有权
    通过氧化硅来减少缺陷

    公开(公告)号:US07816664B2

    公开(公告)日:2010-10-19

    申请号:US12139080

    申请日:2008-06-13

    IPC分类号: H01L29/06

    摘要: A high-quality, substantially relaxed SiGe-on-insulator substrate material which may be used as a template for strained Si is described. The substantially relaxed SiGe-on-insulator substrate includes a Si-containing substrate, an insulating region that is resistant to Ge diffusion present atop the Si-containing substrate, and a substantially relaxed SiGe layer present atop the insulating region. The insulating region includes an upper region that is comprised of a thermal oxide and the substantially relaxed SiGe layer has a thickness of about 2000 nm or less.

    摘要翻译: 描述了可用作应变Si的模板的高质量,基本上松弛的绝缘体上硅衬底材料。 基本上松弛的绝缘体上硅衬底包括含硅衬底,在含Si衬底顶部存在耐Ge扩散的绝缘区域和存在于绝缘区域顶部的基本弛豫的SiGe层。 绝缘区域包括由热氧化物组成的上部区域,并且基本上松弛的SiGe层具有约2000nm或更小的厚度。

    DEFECT REDUCTION BY OXIDATION OF SILICON
    9.
    发明申请
    DEFECT REDUCTION BY OXIDATION OF SILICON 有权
    通过氧化硅减少缺陷

    公开(公告)号:US20080246019A1

    公开(公告)日:2008-10-09

    申请号:US12139080

    申请日:2008-06-13

    IPC分类号: H01L29/15 H01L29/165

    摘要: A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.

    摘要翻译: 描述了可以用作应变Si的模板的制造高质量,基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时,位错运动的性质使得当埋入的氧化物半粘着时,应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式,原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱,SiGe合金随后可以使用内部氧化来消耗。

    Defect reduction by oxidation of silicon
    10.
    发明授权
    Defect reduction by oxidation of silicon 失效
    通过氧化硅来减少缺陷

    公开(公告)号:US07169226B2

    公开(公告)日:2007-01-30

    申请号:US10610612

    申请日:2003-07-01

    IPC分类号: C30B13/00 H01L21/20

    摘要: A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.

    摘要翻译: 描述了可以用作应变Si的模板的制造高质量,基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时,位错运动的性质使得当埋入的氧化物半粘着时,应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式,原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱,SiGe合金随后可以使用内部氧化来消耗。