Caching policy in a multicore system on a chip (SOC)

    公开(公告)号:US10789175B2

    公开(公告)日:2020-09-29

    申请号:US15610823

    申请日:2017-06-01

    Abstract: A computing system comprises one or more cores. Each core comprises a processor and switch with each processor coupled to a communication network among the cores. Also disclosed are techniques for implementing an adaptive last level allocation policy in a last level cache in a multicore system receiving one or more new blocks for allocating for storage in the cache, accessing a selected profile from plural profiles that define allocation actions, according to a least recently used type of allocation and based on a cache action, a state bit, and traffic pattern type for the new blocks of data and handling the new block according to the selected profile for a selected least recently used (LRU) position in the cache.

    Direct updating of network delay in synchronization packets
    22.
    发明授权
    Direct updating of network delay in synchronization packets 有权
    直接更新同步数据包中的网络延迟

    公开(公告)号:US09031063B2

    公开(公告)日:2015-05-12

    申请号:US13778180

    申请日:2013-02-27

    CPC classification number: H04J3/0673 H04J3/0667 H04L43/0852

    Abstract: A method includes receiving in a network element a packet, which includes a delay field that indicates an overall time delay accumulated by the packet until arriving at the network element. Upon receiving the packet, an interim value is substituted in the delay field. The interim value is indicative of a difference between the overall time delay and an arrival time of the packet at the network element. Before sending the packet from the network element, the overall time delay is updated in the delay field based on the interim value and on a departure time at which the packet is to exit the network element. The packet, including the updated overall time delay, is transmitted from the network element.

    Abstract translation: 一种方法包括在网络元件中接收分组,分组包括指示由分组累积的总时间延迟直到到达网络元素的延迟字段。 在接收到分组后,在延迟字段中替换中间值。 中间值表示整个时间延迟与分组在网络元件的到达时间之间的差异。 在从网元发送分组之前,基于中间值和分组要离开网元的出发时间,在延迟字段中更新整个时间延迟。 包括更新的总体时间延迟的分组从网络元件发送。

    FLEXIBLE CRYPTOGRAPHIC ARCHITECTURE IN A NETWORK DEVICE

    公开(公告)号:US20240146703A1

    公开(公告)日:2024-05-02

    申请号:US18195615

    申请日:2023-05-10

    CPC classification number: H04L63/0485 H04L9/0618 H04L63/123

    Abstract: A network device includes a hardware pipeline to process a network packet to be encrypted. A portion of the hardware pipeline retrieves information from the network packet and generates a command based on the information. A block cipher circuit is coupled inline within the hardware pipeline. The hardware pipeline includes hardware engines coupled between the portion of the hardware pipeline and the block cipher circuit. The hardware engines parse and execute the command to determine a set of inputs and input the set of inputs and portions of the network packet to the block cipher circuit. The block cipher circuit encrypts a payload data of the network packet based on the set of inputs.

    Computational accelerator for storage operations

    公开(公告)号:US11765079B2

    公开(公告)日:2023-09-19

    申请号:US17973962

    申请日:2022-10-26

    Abstract: A method includes detecting, by an accelerator of a networking device, a serial number of a first data packet is out of order with respect to a previous data packet within a first flow of data packets associated with a packet communication network, wherein the serial number is assigned to the first data packet according to a transport protocol. The method includes reconstructing context data associated with the first flow of data packets, wherein the context data comprises encoding information for encoding of data records containing data conveyed in payloads of data packets in the first flow of data packets according to a storage protocol. The method includes using, by the accelerator, the reconstructed context data in processing a data record associated with a second data packet within the first flow, wherein the second data packet is subsequent to the first data packet in the first flow of data packets.

    Secure and efficient distributed processing
    26.
    发明公开

    公开(公告)号:US20230185606A1

    公开(公告)日:2023-06-15

    申请号:US17899648

    申请日:2022-08-31

    CPC classification number: G06F9/4881 G06F9/5027 G06F9/5072 G06F9/3877

    Abstract: In one embodiment, a secure distributed processing system includes nodes connected over a network, and configured to process tasks, each respective one of the nodes including a respective processor to process data of respective ones of the tasks, and a respective network interface controller to connect to other nodes over the network, store task master keys for use in computing communication keys for securing data transfer over the network for respective ones of the tasks, compute respective task and node-pair specific communication keys for securing communication with respective ones of the nodes over the network for respective ones of the tasks responsively to respective ones of the task master keys and node-specific data of respective node pairs, and securely communicate the processed data of the respective ones of the tasks with the respective ones of the nodes over the network responsively to the respective task and node-pair specific communication keys.

    Cryptographic Data Communication Apparatus

    公开(公告)号:US20230097439A1

    公开(公告)日:2023-03-30

    申请号:US18075460

    申请日:2022-12-06

    Abstract: In one embodiment, data communication apparatus includes packet processing circuitry to receive data from a memory responsively to a data transfer request, and cryptographically process the received data in units of data blocks using a block cipher so as to add corresponding cryptographically processed data blocks to a sequence of data packets, the sequence including respective ones of the cryptographically processed data blocks having block boundaries that are not aligned with payload boundaries of respective one of the packets, such that respective ones of the cryptographically processed data blocks are divided into two respective segments, which are contained in successive respective ones of the packets in the sequence, and a network interface which includes one or more ports for connection to a packet data network and is configured to send the sequence of data packets to a remote device over the packet data network via the one or more ports.

    COMPUTATIONAL ACCELERATOR FOR STORAGE OPERATIONS

    公开(公告)号:US20230046221A1

    公开(公告)日:2023-02-16

    申请号:US17973962

    申请日:2022-10-26

    Abstract: A method includes detecting, by an accelerator of a networking device, a serial number of a first data packet is out of order with respect to a previous data packet within a first flow of data packets associated with a packet communication network, wherein the serial number is assigned to the first data packet according to a transport protocol. The method includes reconstructing context data associated with the first flow of data packets, wherein the context data comprises encoding information for encoding of data records containing data conveyed in payloads of data packets in the first flow of data packets according to a storage protocol. The method includes using, by the accelerator, the reconstructed context data in processing a data record associated with a second data packet within the first flow, wherein the second data packet is subsequent to the first data packet in the first flow of data packets.

    Computational accelerator for storage operations

    公开(公告)号:US20230034545A1

    公开(公告)日:2023-02-02

    申请号:US17963216

    申请日:2022-10-11

    Abstract: A system includes a host processor, which has a host memory and is coupled to store data in a non-volatile memory in accordance with a storage protocol. A network interface controller (NIC) receives data packets conveyed over a packet communication network from peer computers containing, in payloads of the data packets, data records that encode data in accordance with the storage protocol for storage in the non-volatile memory. The NIC processes the data records in the data packets that are received in order in each flow from a peer computer and extracts and writes the data to the host memory, and when a data packet arrives out of order, writes the data packet to the host memory without extracting the data and processes the data packets in the flow so as to recover context information for use in processing the data records in subsequent data packets in the flow.

    DIRECT UPDATING OF NETWORK DELAY IN SYNCHRONIZATION PACKETS
    30.
    发明申请
    DIRECT UPDATING OF NETWORK DELAY IN SYNCHRONIZATION PACKETS 有权
    网络延迟在同步分组中的直接更新

    公开(公告)号:US20140241344A1

    公开(公告)日:2014-08-28

    申请号:US13778180

    申请日:2013-02-27

    CPC classification number: H04J3/0673 H04J3/0667 H04L43/0852

    Abstract: A method includes receiving in a network element a packet, which includes a delay field that indicates an overall time delay accumulated by the packet until arriving at the network element. Upon receiving the packet, an interim value is substituted in the delay field. The interim value is indicative of a difference between the overall time delay and an arrival time of the packet at the network element. Before sending the packet from the network element, the overall time delay is updated in the delay field based on the interim value and on a departure time at which the packet is to exit the network element. The packet, including the updated overall time delay, is transmitted from the network element.

    Abstract translation: 一种方法包括在网络元件中接收分组,分组包括指示由分组累积的总时间延迟直到到达网络元素的延迟字段。 在接收到分组后,在延迟字段中替换中间值。 中间值表示整个时间延迟与分组在网络元件的到达时间之间的差异。 在从网元发送分组之前,基于中间值和分组要离开网元的出发时间,在延迟字段中更新总时间延迟。 包括更新的总体时间延迟的分组从网络元件发送。

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