公开(公告)号：US11940933B2

公开(公告)日：2024-03-26

申请号：US17189303

申请日：2021-03-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Idan Burstein ,  Dotan David Levi ,  Ariel Shahar ,  Lior Narkis ,  Igor Voks ,  Noam Bloch ,  Shay Aisman

IPC: G06F13/16 ,  G06F9/455 ,  G06F9/46 ,  G06F12/1045 ,  G06F13/38 ,  G06F13/42 ,  G06F15/173

CPC classification number: G06F13/1668 ,  G06F9/45558 ,  G06F9/466 ,  G06F12/1054 ,  G06F12/1063 ,  G06F13/387 ,  G06F13/4221 ,  G06F15/17331 ,  G06F2009/45579

Abstract: A computing system includes at least one peripheral bus, a peripheral device connected to the at least one peripheral bus, at least one memory, and first and second system components. The first system component is (i) associated with a first address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The second system component is (i) associated with a second address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The first system component is arranged to cause the peripheral device to access the second address space that is associated with the second system component.

公开(公告)号：US20230359537A1

公开(公告)日：2023-11-09

申请号：US18347658

申请日：2023-07-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ran Koren ,  Shay Aisman ,  Itamar Rabenstein ,  Amir Ancel

IPC: G06F11/273 ,  G06F13/20 ,  G06F11/22 ,  G06F11/34 ,  G06F11/30

CPC classification number: G06F11/273 ,  G06F13/20 ,  G06F11/2268 ,  G06F11/3485 ,  G06F11/3072 ,  G06F11/3075 ,  G06F11/3476 ,  G06F11/348 ,  G06F11/3013

Abstract: An apparatus includes operational circuitry and Hardware Diagnostics Circuitry (HDC). The HDC is configured to receive a definition of multiple trigger rules, each trigger rule specifying a respective trigger event as a function of trigger data sources in the operational circuitry, to receive a definition of (i) a pre-trigger logging set selected from among a plurality of diagnostics data sources in the operational circuitry, and (ii) for each trigger rule, a respective post-trigger logging set including a set of one or more of the diagnostics data sources, and, during operation of the operational circuitry, to log the diagnostics data sources in the pre-trigger logging set, to log the trigger data sources and to repeatedly evaluate the trigger rules, and, in response to triggering of a given trigger event by a given trigger rule, to start logging the diagnostics data sources in the post-trigger logging set of the given trigger rule.

公开(公告)号：US11711320B2

公开(公告)日：2023-07-25

申请号：US17372555

申请日：2021-07-12

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Sharon Ulman ,  Eyal Srebro ,  Shay Aisman

IPC: H04L49/55 ,  H04L1/1607 ,  H04L43/0823 ,  H04L1/20 ,  H04L43/0852 ,  H04L1/00 ,  H04L49/00

CPC classification number: H04L49/555 ,  H04L1/0061 ,  H04L1/1628 ,  H04L1/203 ,  H04L43/0823 ,  H04L43/0852 ,  H04L49/30

Abstract: In one embodiment, a network device, including packet processing circuitry, which includes at least one interface configured to receive packets, and packet forwarding circuitry configured to make respective forwarding decisions for respective ones of the packets, wherein the packet processing circuitry is configured to assign sequence numbers to the packets in at least one stage of packet processing, find missing packets in at least one corresponding later stage of the packet processing responsively to checking for missing sequence numbers among the assigned sequence numbers, and report the missing packets.

公开(公告)号：US11546216B2

公开(公告)日：2023-01-03

申请号：US17129978

申请日：2020-12-22

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ido Gilboa ,  Shay Aisman ,  Sagi Arieli ,  Oren Vaserberger ,  Amit Mandelbaum ,  Doron Haritan Kazakov ,  Natali Shechtman ,  Iftah Levi ,  Amir Ancel

IPC: H04L41/0823 ,  H04L41/083 ,  H04L47/283 ,  H04L41/0866 ,  H04L41/08 ,  H04L41/085

Abstract: A network device (ND) includes packet processing circuitry and performance optimization circuitry. The packet processing circuitry is connected to a network and is configured to process communication packets for communicating over the network. The packet processing circuitry includes a plurality of configuration registers for setting one or more operation parameters of the ND. The performance optimization circuitry is configured to improve a performance measure of the ND by iteratively calculating the performance measure and adjusting values of one or more of the configuration registers based on the performance measure.