摘要:
A semisubmersible water surface navigation ship with even draft comprising at least two lower hulls, which can be submerged under water to reduce resistance and have a shape affording low friction resistance, and which are equipped with lifting and diving planes, at the bow and stern parts, and an upper hull above the water surface being connected to the lower hulls by way of water breakers. In order to keep an even draft or trim during navigation, the lifting/diving force capacity of the lifting and diving planes is designed to be greater than the buoyancy change of the water breakers owing to loads such as waves and wind. Steering rudders, propellers and water ballast tanks are installed in order to cause the ship to navigate or lie to under any one of a shallow draft state, a semisubmerged state and a deep submerged state. The upper hull is provided with superstructures with sufficient reserve buoyancy for maintaining the stability of the ship under the deep submerged state. Barges carrying cargoes can be mounted on or dismounted from the upper hull in the deep submerged state, and thus they can be loaded and unloaded in an integrated manner.
摘要:
A joint structure, constituting a camshaft, of a metallic tubular member and metallic annular cam defining parts, the annular parts being joined to the outer periphery of the tubular member. Each of the annular parts has around its inner periphery at least one serrated portion which cuts into the outer periphery of the tubular member when they are joined, the annular part also having a planar portion facing another portion of the tubular member in such a manner that substantially no pressure is exerted on the planar portion of the annular part.
摘要:
A gas sensor is described which includes a layer of a sensitive material formed on an electric insulating substrate and spaced electrodes electrically connected to the layer. The layer is formed of a porous film of a uniform mixture which contains a p-type compound oxide semiconductor with a perovskite type of crystal structure as the major ingredient and one or more of vanadium, niobium, tantalum and/or compounds thereof as minor ingredients. The minor ingredients are contained in the layer in an amount of 0.01 to 5% by weight, based on the weight of the p-type compound oxide semiconductor, and are incorporated into the layer by diffusing them into the layer. The gas sensor exhibits a small change with time and a reduced tailing effect attendant on variations in the gas combustion. With this, it is possible to effect measurements, detection and control with a high reliability.
摘要:
A wrapping machine has a heat sealing band running horizontally forward along a feed passage which lies in front of a former which forms a strip piece of film into a tube. The heat sealing band is put on a pair of electrode pulleys, and its upper portion between a pair of the electrode pulleys which runs along the feed passage is charged with electricity directly through a pair of the electrode pulleys.
摘要:
A panel structure is fabricated by stretching a skin plate with a tensile stress below the elastic limit stress thereof, securing this plate onto a framework with the plate under a constraining tensile stress and with portions thereof to which the constraining stress is not being fully applied being heated thereby to cause thermal expansion thereof, removing the constraining stress, and permitting the plate to cool and thereby to undergo thermal contraction and deformation, thereby producing tensile residual stress within the plate, whereby occurrence of welding deformations in the plate on the finished panel is prevented. Depending on the necessity, the skin plate may be prestretched with a stress exceeding the yield point thereof before the above described panel fabrication.
摘要:
The information processing device in the simultaneous multi-threading system is operated in an inter-thread performance load arbitration control method, and includes: an instruction input control unit for sharing among threads control of inputting an instruction in an arithmetic unit for acquiring the instruction from memory and performing an operation on the basis of the instruction; a commit stack entry provided for each thread for holding information obtained by decoding the instruction; an instruction completion order control unit for updating the memory and a general purpose register depending on an arithmetic result obtained by the arithmetic unit in an order of the instructions input from the instruction input control unit; and a performance load balance analysis unit for detecting the information registered in the commit stack entry and controlling the instruction input control unit.
摘要:
An arithmetic device simultaneously processes a plurality of threads and may continue the process by minimizing the degradation of the entire performance although a hardware error occurs. An arithmetic device 100 includes: an instruction execution circuit 101 capable of selectively executing a mode in which the instruction sequences of a plurality of threads are executed and a mode in which the instruction sequence of a single thread is executed; and a switch indication circuit 102 instructing the instruction execution circuit 101 to switch a thread mode.
摘要:
A processor device having a reservation station (RS) is concerned. In case the processor device has plural RS, the RS is associated with an arithmetic pipeline, and two RS make a pair. When one RS of the pair cannot dispatch an instruction to an associated arithmetic pipeline, the other RS dispatches the instruction to that arithmetic pipeline, or delivers its held instruction to the one RS. In case one RS is equipped, plural entries in the RS are divided into groups, and by dynamically changing this grouping according to the dispatch frequency of the instruction to the arithmetic pipelines or the held state of the instructions, the arithmetic pipelines are efficiently utilized. Incidentally, depending on the grouping of the plural entries in the RS, a configuration as if the plural RS were allocated to each arithmetic pipeline may be realized.
摘要:
A processor capable of executing conditional store instructions without being limited by the number of condition codes is provided. Condition data is stored in floating-point registers, and an operation unit executes a conditional floating-point store instruction of determining whether to store, in cache, store data.
摘要:
Multiple data processing instructions instruct a computing device to process multiple data including first data and second data. When a multiple data processing instruction is decoded, two allocatable registers are selected. One is used to store the result of a processing operation performed on first data by one processing unit, and the other is used to store the result of a processing operation performed on second data by another processing unit. Those stored processing results are then transferred to result registers. Normal data processing instructions, on the other hand, instruct a processing operation on third data. When a normal data processing instruction is decoded, one allocatable register is selected and used to store the result of processing that a processing unit performs on the third data. The stored processing result is then transferred to a result register.