Semiconductor device with extension structure and method for fabricating the same
    21.
    发明授权
    Semiconductor device with extension structure and method for fabricating the same 有权
    具有延伸结构的半导体器件及其制造方法

    公开(公告)号:US08236641B2

    公开(公告)日:2012-08-07

    申请号:US13168183

    申请日:2011-06-24

    IPC分类号: H01L21/8238

    摘要: A semiconductor device includes a semiconductor region, a source region, a drain region, a source extension region a drain extension region, a first gate insulation film, a second gate insulation film, and a gate electrode. The source region, drain region, source extension region and drain extension region are formed in a surface portion of the semiconductor region. The first gate insulation film is formed on the semiconductor region between the source extension region and the drain extension region. The first gate insulation film is formed of a silicon oxide film or a silicon oxynitride film having a nitrogen concentration of 15 atomic % or less. The second gate insulation film is formed on the first gate insulation film and contains nitrogen at a concentration of between 20 atomic % and 57 atomic %. The gate electrode is formed on the second gate insulation film.

    摘要翻译: 半导体器件包括半导体区域,源极区域,漏极区域,源极延伸区域,漏极延伸区域,第一栅极绝缘膜,第二栅极绝缘膜和栅极电极。 源极区域,漏极区域,源极延伸区域和漏极延伸区域形成在半导体区域的表面部分中。 第一栅极绝缘膜形成在源极延伸区域和漏极延伸区域之间的半导体区域上。 第一栅极绝缘膜由氮浓度为15原子%以下的氧化硅膜或氮氧化硅膜形成。 第二栅极绝缘膜形成在第一栅极绝缘膜上,并且含有浓度为20原子%至57原子%之间的氮。 栅电极形成在第二栅绝缘膜上。

    Method for manufacturing semiconductor device, including multiple heat treatment

    公开(公告)号:USRE43521E1

    公开(公告)日:2012-07-17

    申请号:US12819339

    申请日:2010-06-21

    CPC分类号: H01L21/823842

    摘要: A semiconductor device manufacturing method having forming first and second insulating gate portions spaced from each other on a semiconductor substrate, selectively implanting the first conductivity type impurity ions to the first gate electrode and a surface layer of the semiconductor substrate adjacent to the first insulating gate portion, selectively implanting the second conductivity type impurity ions to the second gate electrode and the surface layer adjacent to the second insulating gate portion, after implanting the first and second conductivity types impurity ions, pre-annealing at a first substrate temperature, and after the pre-annealing, main-activating for the first and second types impurity ions at a second substrate temperature higher than the first substrate temperature for a treatment period shorter than a period of the pre-annealing.

    Manufacturing method of semiconductor device subjected to heat treatment by use of optical heating apparatus
    23.
    发明授权
    Manufacturing method of semiconductor device subjected to heat treatment by use of optical heating apparatus 有权
    使用光学加热装置进行热处理的半导体装置的制造方法

    公开(公告)号:US07763553B2

    公开(公告)日:2010-07-27

    申请号:US12025916

    申请日:2008-02-05

    IPC分类号: H01L21/00

    摘要: An auxiliary heating process is performed to set the temperature of the outer peripheral portion of a semiconductor substrate higher than that of the central portion thereof by use of an auxiliary heating source which supplementally heats a region of an area smaller than the area of the main surface of the semiconductor substrate from the rear surface of the main surface thereof, pulse-like flash lamp light or laser light is applied in the auxiliary heated state and the heat treatment is performed by use of the applied energy. The flash lamp light is applied to the main surface of the semiconductor substrate in a pulse form of 0.1 ms to 100 ms.

    摘要翻译: 执行辅助加热处理,以通过使用辅助加热源来将半导体基板的外周部分的温度设置为高于其中心部分的温度,辅助加热源补充地加热比主表面的面积小的区域的区域 半导体衬底从其主表面的后表面,在辅助加热状态下施加脉冲状闪光灯或激光,并且通过施加的能量进行热处理。 闪光灯以0.1ms至100ms的脉冲形式施加到半导体衬底的主表面。

    Annealing furnace, manufacturing apparatus, annealing method and manufacturing method of electronic device
    25.
    发明授权
    Annealing furnace, manufacturing apparatus, annealing method and manufacturing method of electronic device 失效
    退火炉,制造装置,退火方法和电子装置的制造方法

    公开(公告)号:US07084068B2

    公开(公告)日:2006-08-01

    申请号:US10661564

    申请日:2003-09-15

    摘要: An annealing furnace, includes a processing chamber configured to store a substrate; a susceptor located in the processing chamber so as to load the substrate and having an auxiliary heater for heating the substrate at 650° C. or less, the susceptor having a surface being made of quartz; a gas supply system configured to supply a gas required for a thermal processing on the substrate in parallel to a surface of the substrate; a transparent window located on an upper part of the processing chamber facing the susceptor; and a main heater configured to irradiate a pulsed light on the surface of the substrate to heat the substrate from the transparent window, the pulsed light having a pulse duration of approximately 0.1 ms to 200 ms and having a plurality of emission wavelengths.

    摘要翻译: 一种退火炉,包括:配置成存储基板的处理室; 位于所述处理室中的基座,以便加载所述基板并具有用于在650℃以下加热所述基板的辅助加热器,所述基座具有由石英制成的表面; 气体供给系统,被配置为平行于所述基板的表面在所述基板上供给热处理所需的气体; 位于处理室的与感受器相对的上部的透明窗口; 以及主加热器,其被配置为在所述基板的表面上照射脉冲光以从所述透明窗加热所述基板,所述脉冲光具有约0.1ms至200ms的脉冲持续时间并且具有多个发射波长。

    Annealing apparatus, annealing method, and manufacturing method of a semiconductor device
    26.
    发明申请
    Annealing apparatus, annealing method, and manufacturing method of a semiconductor device 有权
    退火装置,退火方法以及半导体装置的制造方法

    公开(公告)号:US20050272228A1

    公开(公告)日:2005-12-08

    申请号:US10926306

    申请日:2004-08-26

    摘要: An annealing apparatus, includes a substrate stage placing a semiconductor substrate; a light source facing the substrate stage, configured to irradiate a pulsed light at a pulse width of approximately 0.1 ms to 100 ms on a surface of the semiconductor substrate; and a mask configured to selectively reduce intensity of the light transmitting a peripheral region along an outer edge of the semiconductor substrate, so as to define an irradiation region by the peripheral region.

    摘要翻译: 退火设备包括:放置半导体衬底的衬底台; 面对所述衬底台的光源,被配置为在所述半导体衬底的表面上照射约0.1ms至100ms的脉冲宽度的脉冲光; 以及掩模,被配置为选择性地降低沿着半导体衬底的外边缘传输周边区域的光的强度,以便通过周边区域限定照射区域。

    Method for manufacturing a semiconductor device
    27.
    发明申请
    Method for manufacturing a semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US20050112854A1

    公开(公告)日:2005-05-26

    申请号:US10960140

    申请日:2004-10-08

    IPC分类号: H01L21/8238 H01L21/425

    摘要: A method for manufacturing a semiconductor device, includes forming a first impurity implanted layer in a semiconductor substrate by selectively implanting ions of a first impurity. A dummy pattern is formed on a surface of the semiconductor substrate above the first impurity implanted layer. A second impurity implanted layer is formed in the semiconductor substrate by implanting ions of a second impurity. An interlevel insulating film is buried on the surface of the semiconductor substrate so as to planarize at the level of the dummy pattern. Ions of the first and second impurities are activated by irradiating the semiconductor substrate with a pulsed light at a pulse width of 0.1 ms to 100 ms. An opening is formed by selectively removing the dummy pattern. A gate insulating film and a gate electrode are formed on the exposed surface of the semiconductor substrate.

    摘要翻译: 一种半导体器件的制造方法,包括通过选择性地注入第一杂质的离子,在半导体衬底中形成第一杂质注入层。 在第一杂质注入层上方的半导体衬底的表面上形成虚设图形。 通过注入第二杂质的离子,在半导体衬底中形成第二杂质注入层。 在半导体衬底的表面上埋设层间绝缘膜,以在虚拟图案的水平面上平坦化。 通过以0.1ms至100ms的脉冲宽度的脉冲光照射半导体衬底来激活第一和第二杂质的离子。 通过选择性地去除虚拟图案形成开口。 在半导体衬底的暴露表面上形成栅极绝缘膜和栅电极。

    Method for manufacturing semiconductor device, including multiple heat treatment
    28.
    再颁专利
    Method for manufacturing semiconductor device, including multiple heat treatment 有权
    制造半导体器件的方法,包括多次热处理

    公开(公告)号:USRE43229E1

    公开(公告)日:2012-03-06

    申请号:US12081248

    申请日:2008-04-11

    CPC分类号: H01L21/823842

    摘要: A semiconductor device manufacturing method having forming first and second insulating gate portions spaced from each other on a semiconductor substrate, selectively implanting the first conductivity type impurity ions to the first gate electrode and a surface layer of the semiconductor substrate adjacent to the first insulating gate portion, selectively implanting the second conductivity type impurity ions to the second gate electrode and the surface layer adjacent to the second insulating gate portion, after implanting the first and second conductivity types impurity ions, pre-annealing at a first substrate temperature, and after the pre-annealing, main-activating for the first and second types impurity ions at a second substrate temperature higher than the first substrate temperature for a treatment period shorter than a period of the pre-annealing.

    摘要翻译: 一种半导体器件制造方法,其具有形成在半导体衬底上彼此间隔开的第一和第二绝缘栅极部分,选择性地将第一导电类型杂质离子注入到第一栅电极和与第一绝缘栅极部分相邻的半导体衬底的表面层 在将第一和第二导电类型的杂质离子注入到第二栅极电极和与第二绝缘栅极部分相邻的表面层之后,在第一衬底温度下进行预退火之后,以及在第一衬底温度之后,选择性地将第二导电型杂质离子注入 在第一衬底温度高于第一衬底温度的第二衬底温度下处理短于预退火周期的处理期间,对第一和第二类杂质离子进行主要激活。

    Fabrication method for semiconductor device and manufacturing apparatus for the same
    29.
    发明申请
    Fabrication method for semiconductor device and manufacturing apparatus for the same 有权
    半导体装置及其制造装置的制造方法

    公开(公告)号:US20080260501A1

    公开(公告)日:2008-10-23

    申请号:US11819776

    申请日:2007-06-29

    IPC分类号: H01L21/677

    摘要: A shallow p-n junction diffusion layer having a high activation rate of implanted ions, low resistivity, and a controlled leakage current is formed through annealing. Annealing after impurities have been doped is carried out through light irradiation. Those impurities are activated by annealing at least twice through light irradiation after doping impurities to a semiconductor substrate 11. The light radiations are characterized by usage of a W halogen lamp RTA or a flash lamp FLA except for the final light irradiation using a flash lamp FLA. Impurity diffusion may be controlled to a minimum, and crystal defects, which have developed in an impurity doping process, may be sufficiently reduced when forming ion implanted layers in a source and a drain extension region of the MOSFET or ion implanted layers in a source and a drain region.

    摘要翻译: 通过退火形成具有注入离子的高激活速率,低电阻率和受控的漏电流的浅p-n结扩散层。 通过光照射进行杂质掺杂后的退火。 通过在将杂质掺杂到半导体衬底11之后通过光照射退火至少两次来激活这些杂质。 除了使用闪光灯FLA的最终光照射之外,光辐射的特征在于使用W卤素灯RTA或闪光灯FLA。 杂质扩散可以被控制到最小,并且当在源的源极和漏极延伸区域中形成离子注入层或在源中的离子注入层形成离子注入层时,可以充分减少在杂质掺杂过程中发展的晶体缺陷,以及 漏极区域。

    Semiconductor manufacturing method using two-stage annealing
    30.
    发明授权
    Semiconductor manufacturing method using two-stage annealing 有权
    半导体制造方法采用两阶段退火

    公开(公告)号:US07300832B2

    公开(公告)日:2007-11-27

    申请号:US10867766

    申请日:2004-06-16

    IPC分类号: H01L21/336

    摘要: A method of semiconductor device manufacture provided includes forming a gate insulating layer upon a single crystal semiconductor substrate, forming a gate electrode made from a polycrystal conductive film upon the gate insulating layer, implanting impurity in the gate electrode and in the surface layer of the semiconductor substrate adjacent to or separate from the gate electrode, performing a first heat treatment, and performing a second heat treatment. The first heat treatment performs heat treatment at a temperature that diffuses the impurity implanted mainly in the gate electrode and controls the diffusion of the impurity implanted in the surface layer of the semiconductor substrate. The second heat treatment performs heat treatment at a higher temperature and for a shorter time than the first heat treatment, and at a temperature that activates the impurity implanted in the semiconductor substrate.

    摘要翻译: 提供的半导体器件制造方法包括在单晶半导体衬底上形成栅极绝缘层,在栅极绝缘层上形成由多晶导电膜制成的栅电极,在栅电极和半导体表面层中注入杂质 基板,与栅电极相邻或分离,进行第一热处理,进行第二热处理。 第一热处理在扩散主要在栅电极中注入的杂质的温度下进行热处理,并控制注入在半导体衬底的表面层中的杂质的扩散。 第二热处理在比第一热处理更高的温度和更短的时间进行热处理,并且在激活注入在半导体衬底中的杂质的温度下进行热处理。