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    Methods of Grinding Semiconductor Wafers Having Improved Nanotopology
    22.
    发明申请
    Methods of Grinding Semiconductor Wafers Having Improved Nanotopology 有权
    研究具有改进的纳米学的半导体晶片的方法

    公开(公告)号：US20110101504A1

    公开(公告)日：2011-05-05

    申请号：US12899262

    申请日：2010-10-06

    Applicant: Milind S. Bhagavat ,  Puneet Gupta ,  Roland R. Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    Inventor： Milind S. Bhagavat ,  Puneet Gupta ,  Roland R. Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    IPC: H01L29/30 ,  B24B1/00

    CPC classification number: B24B7/228 ,  B24B7/17 ,  B24B37/08 ,  B24B37/28 ,  B24B41/061

    Abstract: Methods for holding a workpiece with a hydrostatic pad are disclosed herein. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer. The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.

    Abstract translation: 本文公开了用静压垫保持工件的方法。 衬垫包括形成在与晶片直接相对的身体的表面中的静水压凹坑。 凹穴适于接收流体通过主体并进入凹穴，以在主体面和工件之间提供阻挡物，同时在研磨期间仍然施加压力以保持工件。 静压垫允许晶片相对于垫围绕其公共轴线旋转。 当砂轮相对于静液压垫移动或倾斜时，袋被定向成减小在晶片中产生的流体静力弯矩，有助于防止通常由砂轮的移动和倾斜引起的晶片表面的纳米拓扑降解。

    Method For Assessing Workpiece Nanotopology Using A Double Side Wafer Grinder
    23.
    发明申请
    Method For Assessing Workpiece Nanotopology Using A Double Side Wafer Grinder 有权
    使用双面晶圆磨床评估工件纳米学的方法

    公开(公告)号：US20100087123A1

    公开(公告)日：2010-04-08

    申请号：US12631929

    申请日：2009-12-07

    Applicant: Roland R. Vandamme ,  Milind S. Bhagavat

    Inventor： Roland R. Vandamme ,  Milind S. Bhagavat

    IPC: B24B49/04 ,  B24B7/17

    CPC classification number: B24B37/28 ,  B24B7/228 ,  B24B49/02

    Abstract: A method of processing a semiconductor wafer using a double side grinder of the type that holds the wafer in a plane with a pair of grinding wheels and a pair of hydrostatic pads. The method includes measuring a distance between the wafer and at least one sensor and determining wafer nanotopology using the measured distance. The determining includes using a processor to perform a finite element structural analysis of the wafer based on the measured distance.

    Abstract translation: 使用将晶片保持在具有一对砂轮的平面中的类型的双面研磨机和一对静压垫来处理半导体晶片的方法。 该方法包括测量晶片与至少一个传感器之间的距离并使用所测量的距离来确定晶片纳米拓扑。 确定包括使用处理器基于测量的距离来执行晶片的有限元结构分析。

    Method of estimating post-polishing waviness characteristics of a semiconductor wafer
    24.
    发明授权
    Method of estimating post-polishing waviness characteristics of a semiconductor wafer 失效
    估计半导体晶片的后抛光波纹特性的方法

    公开(公告)号：US06613591B1

    公开(公告)日：2003-09-02

    申请号：US10092479

    申请日：2002-03-07

    Applicant: Milind S. Bhagavat ,  Yun-Biao Xin ,  Gary L. Anderson ,  Brent F. Teasley

    Inventor： Milind S. Bhagavat ,  Yun-Biao Xin ,  Gary L. Anderson ,  Brent F. Teasley

    IPC: H01L2100

    CPC classification number: B24B37/005 ,  B24B37/042 ,  B24B49/00

    Abstract: A method for estimating the likely waviness of a wafer after polishing based upon an accurate measurement of the waviness of the wafer in an as-cut condition, before polishing. The method measures the thickness profile of an upper and lower wafer surface to construct a median profile of the wafer in the direction of wiresaw cutting. The median surface is then passed through an appropriate Gaussian filter, such that the warp of the resulting profile estimates whether the wafer will exhibit unacceptable waviness in a post-polished stage.

    Abstract translation: 一种用于在抛光之前基于精确测量晶片在切割条件下的波纹度来估计抛光后晶片的可能波纹度的方法。 该方法测量上下晶片表面的厚度分布，以在切线方向上构建晶片的中间轮廓。 然后将中间表面通过适当的高斯滤波器，使得所得轮廓的翘曲估计晶片在后抛光阶段是否将呈现不可接受的波纹。

    Flexural plate wave device for chip cooling
    25.
    发明授权
    Flexural plate wave device for chip cooling 有权
    用于芯片冷却的弯曲板波装置

    公开(公告)号：US09123698B2

    公开(公告)日：2015-09-01

    申请号：US13173456

    申请日：2011-06-30

    Applicant: Milind S. Bhagavat ,  Seyed Mahdi Saeidi ,  Tak Sang Yeung

    Inventor： Milind S. Bhagavat ,  Seyed Mahdi Saeidi ,  Tak Sang Yeung

    IPC: H01L23/34 ,  H01L23/467 ,  H05K7/20

    CPC classification number: H01L23/467 ,  H01L23/3675 ,  H01L2924/0002 ,  H05K7/20136 ,  H05K7/20145 ,  H05K7/20154 ,  H01L2924/00

    Abstract: Methods, systems, and apparatuses are described for cooling electronic devices. The electrical device includes an integrated circuit die (IC) having opposing first and second surfaces, a plurality of interconnects on the second surface of the IC die that enable the IC die to be coupled to a substrate, and a flexural plate wave device. The flexural plate wave device is configured to generate a stream of air to flow across the electrical device to cool the IC die during operation of the IC die.

    Abstract translation: 描述了用于冷却电子设备的方法，系统和装置。 电气装置包括具有相对的第一和第二表面的集成电路管芯（IC），IC模头的第二表面上的使得IC管芯能够耦接到衬底的多个互连件，以及弯曲板形波装置。 弯曲板波装置被配置为产生流过电气装置的空气流，以在IC管芯的工作期间冷却IC管芯。

    Methods of grinding semiconductor wafers having improved nanotopology
    26.
    发明授权
    Methods of grinding semiconductor wafers having improved nanotopology 有权
    研磨具有改进的纳米拓扑学的半导体晶片的方法

    公开(公告)号：US08267745B2

    公开(公告)日：2012-09-18

    申请号：US12899262

    申请日：2010-10-06

    Applicant: Milind S. Bhagavat ,  Puneet Gupta ,  Roland R. Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    Inventor： Milind S. Bhagavat ,  Puneet Gupta ,  Roland R. Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    IPC: B24B1/00

    CPC classification number: B24B7/228 ,  B24B7/17 ,  B24B37/08 ,  B24B37/28 ,  B24B41/061

    Abstract: Methods for holding a workpiece with a hydrostatic pad are disclosed herein. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer. The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.

    Abstract translation: 本文公开了用静压垫保持工件的方法。 衬垫包括形成在与晶片直接相对的身体的表面中的静水压凹坑。 凹穴适于接收流体通过主体并进入凹穴，以在主体面和工件之间提供阻挡物，同时在研磨期间仍然施加压力以保持工件。 静压垫允许晶片相对于垫围绕它们的公共轴线旋转。 当砂轮相对于静液压垫移动或倾斜时，袋被定向成减小在晶片中产生的流体静力弯矩，有助于防止通常由砂轮的移动和倾斜引起的晶片表面的纳米拓扑降解。

    Wafer clamping device for a double side grinder
    27.
    发明授权
    Wafer clamping device for a double side grinder 有权
    用于双面研磨机的晶片夹紧装置

    公开(公告)号：US08066553B2

    公开(公告)日：2011-11-29

    申请号：US10598851

    申请日：2005-01-20

    Applicant: Milind S. Bhagavat ,  Puneet Gupta ,  Roland Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    Inventor： Milind S. Bhagavat ,  Puneet Gupta ,  Roland Vandamme ,  Takuto Kazama ,  Noriyuki Tachi

    IPC: B24B41/06

    CPC classification number: B24B7/228 ,  B24B7/17 ,  B24B37/08 ,  B24B37/28 ,  B24B41/061

    Abstract: A hydrostatic pad for use in holding a semiconductor wafer during grinding of the wafer by grinding wheels. The pad includes hydrostatic pockets formed in a face of the body directly opposed to the wafer. The pockets are adapted for receiving fluid through the body and into the pockets to provide a barrier between the body face and the workpiece while still applying pressure to hold the workpiece during grinding. The hydrostatic pads allow the wafer to rotate relative to the pads about their common axis. The pockets are oriented to reduce hydrostatic bending moments that are produced in the wafer when the grinding wheels shift or tilt relative to the hydrostatic pads, helping prevent nanotopology degradation of surfaces of the wafer commonly caused by shift and tilt of the grinding wheels.

    Abstract translation: 一种静压垫，用于在通过研磨轮磨削晶片时保持半导体晶片。 衬垫包括形成在与晶片直接相对的身体的表面中的静水压凹坑。 凹穴适于接收流体通过主体并进入凹穴，以在主体面和工件之间提供阻挡物，同时在研磨期间仍然施加压力以保持工件。 静压垫允许晶片相对于垫围绕其公共轴线旋转。 当砂轮相对于静液压垫移动或倾斜时，袋被定向成减小在晶片中产生的流体静力弯矩，有助于防止通常由砂轮的移动和倾斜引起的晶片表面的纳米拓扑降解。

    BOND PADS FOR LOW TEMPERATURE HYBRID BONDING
    29.
    发明申请
    BOND PADS FOR LOW TEMPERATURE HYBRID BONDING 审中-公开

    公开(公告)号：US20200006280A1

    公开(公告)日：2020-01-02

    申请号：US16023399

    申请日：2018-06-29

    Applicant: Priyal Shah ,  Milind S. Bhagavat

    Inventor： Priyal Shah ,  Milind S. Bhagavat

    IPC: H01L23/00

    Abstract: Various chip stacks and methods and structures of interconnecting the same are disclosed. In one aspect, an apparatus is provided that includes a first semiconductor chip that has a first glass layer and plural first groups of plural conductor pads in the first glass layer. Each of the plural first groups of conductor pads is configured to bumplessly connect to a corresponding second group of plural conductor pads of a second semiconductor chip to make up a first interconnect of a plurality interconnects that connect the first semiconductor chip to the second semiconductor chip. The first glass layer is configured to bond to a second glass layer of the second semiconductor chip.

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