公开(公告)号：US20090029524A1

公开(公告)日：2009-01-29

申请号：US12244621

申请日：2008-10-02

申请人： Kenji KANAMITSU ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji KANAMITSU ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L21/762

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

摘要翻译： 一种半导体集成电路器件及其制造方法。 由元件隔离沟槽围绕的有源区的基板的表面在有源区的中心部分水平平坦，但是朝向有源区的肩部中的元件隔离沟的侧壁落下。 该倾斜面包含两个具有不同倾斜角的倾斜面。 有源区的中心部附近的第一倾斜面比较陡，元件隔离沟的侧壁附近的第二倾斜面比第一倾斜面更平缓。 有源区的肩部中的基板的表面完全是圆形的，并且没有角部。

公开(公告)号：US06544839B1

公开(公告)日：2003-04-08

申请号：US09473297

申请日：1999-12-28

申请人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L218242

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

摘要翻译： 一种半导体集成电路器件及其制造方法。 由元件隔离沟槽围绕的有源区的基板的表面在有源区的中心部分水平平坦，但是朝向有源区的肩部中的元件隔离沟的侧壁落下。 该倾斜面包含两个具有不同倾斜角的倾斜面。 有源区的中心部附近的第一倾斜面比较陡，元件隔离沟的侧壁附近的第二倾斜面比第一倾斜面更平缓。 有源区的肩部中的基板的表面完全是圆形的，并且没有角部。

公开(公告)号：US07524729B2

公开(公告)日：2009-04-28

申请号：US11189833

申请日：2005-07-27

申请人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L21/76 ,  H01L21/336

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

摘要翻译： 一种半导体集成电路器件及其制造方法。 由元件隔离沟槽围绕的有源区的基板的表面在有源区的中心部分水平平坦，但是朝向有源区的肩部中的元件隔离沟的侧壁落下。 该倾斜面包含两个具有不同倾斜角的倾斜面。 有源区的中心部附近的第一倾斜面比较陡，元件隔离沟的侧壁附近的第二倾斜面比第一倾斜面更平缓。 有源区的肩部中的基板的表面完全是圆形的，并且没有角部。

公开(公告)号：US20050260820A1

公开(公告)日：2005-11-24

申请号：US11189833

申请日：2005-07-27

申请人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L27/06 ,  H01L21/28 ,  H01L21/331 ,  H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

摘要翻译： 一种半导体集成电路器件及其制造方法。 由元件隔离沟槽围绕的有源区的基板的表面在有源区的中心部分水平平坦，但是朝向有源区的肩部中的元件隔离沟的侧壁落下。 该倾斜面包含两个具有不同倾斜角的倾斜面。 有源区的中心部附近的第一倾斜面比较陡，元件隔离沟的侧壁附近的第二倾斜面比第一倾斜面更平缓。 有源区的肩部中的基板的表面完全是圆形的，并且没有角部。

公开(公告)号：US06967141B2

公开(公告)日：2005-11-22

申请号：US10919432

申请日：2004-08-17

申请人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L27/06 ,  H01L21/28 ,  H01L21/331 ,  H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

公开(公告)号：US20050014340A1

公开(公告)日：2005-01-20

申请号：US10919432

申请日：2004-08-17

申请人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

发明人： Kenji Kanamitsu ,  Kouzou Watanabe ,  Norio Suzuki ,  Norio Ishitsuka

IPC分类号： H01L27/06 ,  H01L21/28 ,  H01L21/331 ,  H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L21/823878 ,  H01L21/28061 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/6659

摘要： A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.

公开(公告)号：US4549340A

公开(公告)日：1985-10-29

申请号：US530471

申请日：1983-09-08

申请人： Kouichi Nagasawa ,  Shuji Ikeda ,  Norio Suzuki ,  Yoshio Sakai

发明人： Kouichi Nagasawa ,  Shuji Ikeda ,  Norio Suzuki ,  Yoshio Sakai

IPC分类号： H01L27/092 ,  H01L21/033 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/105 ,  H01L29/78 ,  H01L21/265 ,  H01L21/22

CPC分类号： H01L21/033 ,  H01L21/76218 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/105

摘要： Disclosed is a method of manufacturing a semiconductor device which includes MOSFETs of the two-channel conductivity types of P- and N-channel types on a single semiconductor substrate. According to the present invention, a first mask and a second mask are used. The first mask covers that surface part of the semiconductor substrate in which the P-channel type MOSFET is to be formed, and it serves as a mask when an N-type impurity is introduced into the semiconductor substrate. The first mask has a property and etching rate different from those of a film formed by the thermal oxidation of the semiconductor substrate surface. The second mask covers that surface part of the semiconductor substrate which has been formed with the N-channel type MOSFET, and it serves as a mask when a P-type impurity is introduced into the semiconductor substrate. The second mask is used as an inter-layer insulator film.

摘要翻译： 公开了一种半导体器件的制造方法，该半导体器件在单个半导体衬底上包括双沟道导电类型的P沟道型和N沟道型的MOSFET。 根据本发明，使用第一掩模和第二掩模。 第一掩模覆盖要形成P沟道型MOSFET的半导体衬底的表面部分，并且当将N型杂质引入到半导体衬底中时，其用作掩模。 第一掩模具有不同于通过半导体衬底表面的热氧化形成的膜的性质和蚀刻速率。 第二掩模覆盖已经形成有N沟道型MOSFET的半导体衬底的表面部分，并且当P型杂质被引入到半导体衬底中时，其用作掩模。 第二掩模用作层间绝缘膜。

公开(公告)号：US06838374B2

公开(公告)日：2005-01-04

申请号：US10170359

申请日：2002-06-14

申请人： Toshiya Uenishi ,  Satoshi Meguro ,  Masaharu Kubo ,  Masataka Kato ,  Hideo Miura ,  Norio Suzuki

发明人： Toshiya Uenishi ,  Satoshi Meguro ,  Masaharu Kubo ,  Masataka Kato ,  Hideo Miura ,  Norio Suzuki

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092 ,  H01L21/4763

CPC分类号： H01L21/76237

摘要： To suppress oxidation of the inner walls of element isolation grooves otherwise occurring during thermal oxidation processes, a nitrogen introducing layer, that has a lower diffusion coefficient relative to an oxidizing agent, is formed at the surface portion of a silicon oxide film buried within an element isolation groove. This nitrogen introduced layer functions as a barrier layer for precluding the oxidizer (such as oxygen, water or the like) in vapor phase from diffusing into the silicon oxide film during thermal processing steps. The nitrogen introduced layer is formed by performing nitrogen ion implantation into the entire surface of a substrate and subsequently applying thermal processing to the substrate to thereby activate the nitrogen that has been doped.

摘要翻译： 为了抑制在热氧化过程中发生的元件隔离槽的内壁的氧化，在埋置在元件内的氧化硅膜的表面部分形成有相对于氧化剂具有较低扩散系数的氮导入层 隔离槽。 该氮引入层用作阻止层，用于排除气相中的氧化剂（例如氧，水等）在热处理步骤期间扩散到氧化硅膜中。 通过在衬底的整个表面中进行氮离子注入并随后对衬底进行热处理从而激活掺杂的氮而形成氮引入层。

公开(公告)号：US08850592B2

公开(公告)日：2014-09-30

申请号：US12808130

申请日：2010-04-02

申请人： Makoto Kayashima ,  Shinichi Tsunoo ,  Hiroshi Nakagoe ,  Hiromi Isokawa ,  Norio Suzuki

发明人： Makoto Kayashima ,  Shinichi Tsunoo ,  Hiroshi Nakagoe ,  Hiromi Isokawa ,  Norio Suzuki

IPC分类号： G06F21/00 ,  G06F21/60 ,  G06F21/55 ,  G06F21/52 ,  H04L29/06

CPC分类号： G06F21/556 ,  G06F21/52 ,  G06F21/552 ,  G06F21/606 ,  G06F2221/0737 ,  G06F2221/2101 ,  G06F2221/2119 ,  H04L63/1416

摘要： The content of operations is identified and an alert is generated to an operation having a high risk of information leakage.An agent monitors, for example, operations performed with respect to a dialogue displayed on a client PC. If a file is selected by an operation performed with respect to the displayed dialogue, the agent assigns an identifier indicating a source for the file to the file. If the file is sent as an attached file, the agent identifies an output destination for the attached file as well as the source for the attached file; and if the output destination for the attached file is an external Web server and the source for the attached file is a mail server, the agent generates an alert by determining that an unauthorized operation has been executed; and then sends the generated alert to a management server.

摘要翻译： 识别操作的内容，并且对具有高信息泄漏风险的操作产生警报。 代理监视例如关于在客户端PC上显示的对话执行的操作。 如果通过对显示的对话执行的操作来选择文件，则代理将指定文件的源的标识符分配给该文件。 如果文件作为附件发送，代理将识别所附文件的输出目的地以及所附文件的源; 并且如果附加文件的输出目的地是外部Web服务器，并且所附加文件的源是邮件服务器，则代理通过确定已经执行了未经授权的操作来生成警报; 然后将生成的警报发送到管理服务器。

公开(公告)号：US20140224150A1

公开(公告)日：2014-08-14

申请号：US14241743

申请日：2012-08-29

申请人： Yohei Konda ,  Mayuko Okamoto ,  Yuji Kameyama ,  Kazuhiro Jonai ,  Norio Suzuki

发明人： Yohei Konda ,  Mayuko Okamoto ,  Yuji Kameyama ,  Kazuhiro Jonai ,  Norio Suzuki

IPC分类号： C09D11/00

CPC分类号： C09D11/322 ,  C09B67/0036 ,  C09D11/00 ,  C09D11/101 ,  C09D11/40

摘要： The present invention provides an active energy ray-curable inkjet magenta ink composition that achieves excellent color reproducibility and is also excellent in storage stability, and an ink set using the composition. The magenta ink composition according to the present invention contains, as two kinds of quinacridone pigments, (A) unsubstituted quinacridone and (B) 2,9-dimethylquinacridone.

摘要翻译： 本发明提供一种能够获得优异的颜色再现性并且还具有优异的储存稳定性的活性能量射线固化喷墨品红色油墨组合物和使用该组合物的油墨组。 根据本发明的洋红色油墨组合物含有（A）未取代的喹吖啶酮和（B）2,9-二甲基喹吖啶酮作为两种喹吖啶酮颜料。