公开(公告)号：US11302727B2

公开(公告)日：2022-04-12

申请号：US16689938

申请日：2019-11-20

Applicant: OmniVision Technologies, Inc.

Inventor： Hui Zang ,  Qin Wang ,  Gang Chen

IPC: H01L27/14 ,  H01L27/146 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423

Abstract: A pixel includes a semiconductor substrate, a photodiode region, a floating diffusion region, and a dielectric layer. The substrate has a top surface forming a trench lined by the dielectric layer, and having a trench depth relative to a planar region of the top surface. The photodiode region is in the substrate and includes a bottom photodiode section beneath the trench and a top photodiode section adjacent to the trench, adjoining the bottom photodiode section, and extending toward the planar region to a photodiode depth less than the trench depth. The floating diffusion region is adjacent to the trench and has a junction depth less than the trench depth. A top region of the dielectric layer is between the planar region and the junction depth. A bottom region of the dielectric layer is between the photodiode depth and the trench depth, and thicker than the top region.

公开(公告)号：US20210233947A1

公开(公告)日：2021-07-29

申请号：US16775022

申请日：2020-01-28

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Yuanliang Liu

IPC: H01L27/146

Abstract: An image sensor includes a substrate having a plurality of small photodiodes and a plurality of large photodiodes surrounding the small photodiodes. The substrate further includes a plurality of deep trench isolation structures in regions of the substrate between ones of the small photodiodes and the large photodiodes. Each of large photodiodes having a full well capacity larger than each of the small photodiodes. The image sensor further includes an array of color filters disposed over the substrate, a first and second buffer layer disposed between the substrate and the array of color filters, metal grid structures disposed between the color filters and above the first buffer layer, and an attenuation layer portion above a region of the substrate between ones of the large and small photodiodes, the attenuation layer portion is between the first and second buffer layers and normal to an upper surface of the substrate.

公开(公告)号：US20210193702A1

公开(公告)日：2021-06-24

申请号：US16720236

申请日：2019-12-19

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

Abstract: A semiconductor structure for a CMOS image sensor includes a semiconductor substrate having a first side and a second side. A photodiode is disposed in the semiconductor substrate proximate to the first side. The photodiode accumulates image charge photogenerated in the photodiode in response to incident light directed through the second side. A deep trench isolation structure enclosing the photodiode. The deep trench isolation structure extends from the second side toward the first side. The deep trench isolation structure includes a light absorption region disposed at a first end of the deep trench isolation structure toward the first side.

公开(公告)号：US20210118925A1

公开(公告)日：2021-04-22

申请号：US16655017

申请日：2019-10-16

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

Abstract: A pixel cell includes a photodiode buried beneath a first side of semiconductor material and coupled to photogenerate image charge in response to incident light. A transfer gate is disposed over the photodiode and includes a vertical transfer gate portion extending a first distance from the first side into the semiconductor material. A floating diffusion region is disposed in the semiconductor material proximate to the transfer gate and is coupled to transfer the image charge from the photodiode toward the first side of the semiconductor material and into the floating diffusion region in response to a transfer control signal. A first pixel transistor having a first gate is disposed over the photodiode proximate to the first side of the semiconductor material. The first gate has a ring structure laterally surrounding the floating diffusion region and the transfer gate at the first side of the semiconductor material.

公开(公告)号：US12289927B2

公开(公告)日：2025-04-29

申请号：US17705133

申请日：2022-03-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Duli Mao ,  Qin Wang ,  Bill Phan ,  Shiyu Sun ,  Hui Zang

IPC: H10F39/00

Abstract: Image sensors, isolation structures, and techniques of fabrication are provided. An image sensor includes a source of electromagnetic radiation disposed on a substrate, a pixel array disposed on the substrate and thermally coupled with source of electromagnetic radiation, and an isolation structure disposed on the substrate between the source of electromagnetic radiation and the pixel array. The isolation structure can define a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching a proximal region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

公开(公告)号：US12154919B2

公开(公告)日：2024-11-26

申请号：US17326103

申请日：2021-05-20

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146 ,  H01L29/06 ,  H01L29/78 ,  H01L29/10

Abstract: Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.

公开(公告)号：US12107107B2

公开(公告)日：2024-10-01

申请号：US17530296

申请日：2021-11-18

Applicant: OmniVision Technologies, Inc.

Inventor： Yifei Du ,  Zhiqiang Lin ,  Hui Zang ,  Seong Yeol Mun

IPC: H01L27/14 ,  H01L27/146

CPC classification number: H01L27/14632 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14645

Abstract: A dark-current-inhibiting image sensor includes a semiconductor substrate, a thin and a thin junction. The semiconductor substrate includes a front surface, a back surface opposite the front surface, a photodiode, and a concave surface between the front surface and the back surface. The concave surface extends from the back surface toward the front surface, and defines a trench that surrounds the photodiode in a cross-sectional plane parallel to the back surface. The thin junction extends from the concave surface into the semiconductor substrate, and is a region of the semiconductor substrate. The semiconductor substrate includes a first substrate region, located between the thin junction and the photodiode, that has a first conductive type. The photodiode and the thin junction have a second conductive type opposite the first conductive type.

公开(公告)号：US20230307474A1

公开(公告)日：2023-09-28

申请号：US17700858

申请日：2022-03-22

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

CPC classification number: H01L27/14614 ,  H01L27/14643 ,  H01L27/14689

Abstract: Transistors, electronic devices, and methods are provided. Transistors include a gate trench formed in a semiconductor substrate and extending to a gate trench depth, and a source and a drain formed as doped regions in the semiconductor substrate and having a first conductive type. The source and the drain are formed along a channel length direction of the transistor at a first end and a second end of the gate trench, respectively, and the source and the drain each includes a first doped region and a second doped region extending away from the first doped region. The second doped region extends to a depth in the semiconductor substrate deeper than the first doped region relative to a surface of the semiconductor substrate.

公开(公告)号：US11710752B2

公开(公告)日：2023-07-25

申请号：US17118252

申请日：2020-12-10

Applicant: OmniVision Technologies, Inc.

Inventor： Yuanliang Liu ,  Bill Phan ,  Duli Mao ,  Hui Zang

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/1463 ,  H01L27/14605 ,  H01L27/14685 ,  H01L27/14621 ,  H01L27/14627

Abstract: A flicker-mitigating pixel-array substrate includes a semiconductor substrate and a metal annulus. The semiconductor substrate includes a small-photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region. The metal annulus (i) at least partially fills the trench, (ii) surrounds the small-photodiode region in the cross-sectional plane, and (iii) extends above the back surface. A method for fabricating a flicker-mitigating pixel-array substrate includes forming a metal layer (i) in a trench that surrounds the small-photodiode region in a cross-sectional plane parallel to a back-surface region of the back surface above the small-photodiode region and (ii) on the back-surface region. The method also includes decreasing a thickness of an above-diode section of the metal layer located above the back-surface region.

公开(公告)号：US20230053960A1

公开(公告)日：2023-02-23

申请号：US17408257

申请日：2021-08-20

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang

IPC: H01L27/146

Abstract: A method for forming a contact pad of a semiconductor device is disclosed. The method includes providing a semiconductor substrate including a first side and a second side. The semiconductor device includes a shallow trench isolation structure, disposed between the first side and the second side, and an intermetal dielectric stack coupled to the second side. The intermetal dielectric stack includes a first metal interconnect. The method further includes etching a first trench into the semiconductor substrate, depositing a dielectric material into the first trench to form a dielectric spacer extending along side walls of the first trench, etching a second trench aligned with the first trench, and depositing a metal material into the second trench to form the contact pad that contacts the first metal interconnect.