摘要:
A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.
摘要:
An exemplary port reducing method is for removing unselected ports of an original S-parameter file and generating an optimized S-parameter file. The method controls a display unit to display a user interface to receive commands from a user in response to user operation; the commands comprise a calling command, a selecting command, and an executing command. The method obtains the original S-parameter file in response to the calling command Next, the method determines which of the ports of the original S-parameter file are unselected in response to the selecting command, and connects each unselected port to the ground through one terminal impedance. The method then generates an optimized S-parameter file that comprises only the selected ports in response to the executing command.
摘要:
A Marchand balun circuit includes a Marchand balun, an unbalanced matching circuit, and a balanced matching circuit. The Marchand balun includes an unbalanced terminal, and two balanced terminals. The unbalanced matching circuit includes a first and the second impedances which are connected between the unbalanced terminal and ground in series, and a first resistor which is connected between ground and a connection node of the first and the second impedances. The balanced matching circuit includes a third and a fourth impedances which are connected between one balanced terminal and ground in series, a fifth and a sixth impedance which are connected between the other balanced terminal and ground in series, a second resistor which is connected between ground and a connection node of the third and the fourth impedances, and a third resistor which is connected between ground and a connection node of the fifth and the sixth impedances.
摘要:
An enclosure includes a sidewall defining a number of first vents and a shield apparatus installed to the sidewall. The shield apparatus includes a shield plate spaced from the sidewall. A distance between the sidewall and the shield plate is greater than a size of the first vent. The shield plate defines a number of second vents respectively aligning with the first vents.
摘要:
A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material.
摘要:
An equalizer includes a first delay module, a second delay module, a first amplitude module, a second amplitude module, and a combining unit. The first delay module receives a first signal and delays the first received signal for a preset period, and the first amplitude module transfers the first delayed signal to transmit a first weighted signal with a first peak amplitude. Similarly, the second delay module receives the first delayed signal and delays the second received signal for the preset period, and the second amplitude module transfers the second delayed signal to transmit a second weighted signal with a second peak amplitude. The combining unit combines an input signal and the first and the second weighted signals together to generate an equalized signal.
摘要:
In a method for analyzing a signal group delay of a printed circuit board (PCB) using a computing device, the computing device connects to a signal measuring device that measures S-parameters from a pair of data signal line and clock signal line of the PCB. The method analyzes a differential loss coefficient of the data signal line and the clock signal line based on the S-parameters, and calculates a first signal delay of the data signal line and a second signal delay of the clock signal line according to the differential loss coefficient. The method further analyzes a signal group delay of the PCB according to the first signal delay and the second signal delay, and displays the signal group delay on a display device if the signal group delay does not satisfy a PCB design specification.
摘要:
A printed circuit board includes an insulating board, a pair of differential vias, and a number of wiring layers. A pair of via holes extends through opposite surfaces of the insulating board. The differential vias correspond to the pair of via holes. Each differential via includes a metal plated barrel and two via capture pads. The plated barrel is plated on the inner surface of the respective via hole, and terminates at each of the two opposite surfaces of the insulating board. The via capture pads are formed on the opposite surfaces of the insulating board around the openings of the via hole, and are electrically connected to the plated barrel. The wiring layers are arranged in the insulating board, and each define a clearance hole surrounding all of the via capture pads.