公开(公告)号：US08536886B2

公开(公告)日：2013-09-17

申请号：US12815663

申请日：2010-06-15

Applicant: Pascal Fornara ,  Christian Rivero

Inventor： Pascal Fornara ,  Christian Rivero

IPC: G01R27/08

CPC classification number: H01L23/544 ,  H01L27/0802 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Wheatstone bridges, each formed of four identical resistors, are used as integrated circuit identification elements. An identification circuit including an assembly of Wheatstone bridges and comparators is formed in a substrate. Since the resistors forming the bridges are sensitive to technological dispersions, the output voltages of the bridges are not identical. Each comparator compares the outputs of two bridges and provides a bit of an identification number of the chip. Preferably, the resistors are covered with insulator only, at least up to a second interconnect level from the substrate.

Abstract translation: 惠斯登电桥由四个相同的电阻组成，分别用作集成电路识别元件。 包括惠斯登电桥和比较器的组件的识别电路形成在衬底中。 由于形成桥的电阻对技术分散敏感，所以桥的输出电压不相同。 每个比较器比较两个桥的输出，并提供一个芯片的标识号。 优选地，电阻器仅由绝缘体覆盖，至少高达与衬底的第二互连水平。

公开(公告)号：US20130015549A1

公开(公告)日：2013-01-17

申请号：US13549248

申请日：2012-07-13

Applicant: Pascal Fornara ,  Christian Rivero

Inventor： Pascal Fornara ,  Christian Rivero

IPC: H01L35/32 ,  H01L27/16 ,  H01L35/14

CPC classification number: H01L35/32 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated thermoelectric generator includes a semiconductor. A set of thermocouples are electrically connected in series and thermally connected in parallel. The set of thermocouples include parallel semiconductor regions. Each semiconductor region has one type of conductivity from among two opposite types of conductivity. The semiconductor regions are electrically connected in series so as to form a chain of regions having, alternatingly, one and the other of the two types of conductivity.

Abstract translation: 集成热电发电机包括半导体。 一组热电偶串联电连接并并联热连接。 该组热电偶包括平行半导体区域。 每个半导体区域具有两种相反类型的导电性中的一种导电性。 半导体区域串联电连接，以便形成交替地具有两种导电性中的一种和另一种的区域链。

公开(公告)号：US08222094B2

公开(公告)日：2012-07-17

申请号：US12326542

申请日：2008-12-02

Applicant: Pascal Fornara

Inventor： Pascal Fornara

IPC: H01L21/00 ,  H01L29/66

CPC classification number: H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/7883

Abstract: A method for manufacturing a cell of a non-volatile electrically erasable and programmable memory including a dual-gate MOS transistor. The method includes the steps of providing a semiconductor substrate covered with an insulating layer including a thinned down portion and having a first surface common with the substrate and a second surface opposite to the first surface; and incorporating nitrogen at the level of the second surface, whereby the maximum nitrogen concentration is closer to the second surface than to the first surface.

Abstract translation: 一种用于制造包括双栅极MOS晶体管的非易失性电可擦除和可编程存储器的单元的方法。 该方法包括以下步骤：提供覆盖有绝缘层的半导体衬底，所述绝缘层包括减薄部分，并且具有与衬底共用的第一表面和与第一表面相对的第二表面; 并且在第二表面的水平处并入氮气，由此最大氮浓度比第一表面更接近第二表面。

公开(公告)号：US20120091553A1

公开(公告)日：2012-04-19

申请号：US13243620

申请日：2011-09-23

Applicant: Pascal Fornara ,  Christian Rivero

Inventor： Pascal Fornara ,  Christian Rivero

IPC: H01L31/058 ,  H01L31/18 ,  H01L21/66

CPC classification number: H01L23/576 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit includes active circuitry disposed at a surface of a semiconductor body and an interconnect region disposed above the semiconductor body. A thermoelectric material is disposed in an upper portion of the interconnect region away from the semiconductor body. The thermoelectric material is configured to deliver electrical energy when exposed to a temperature gradient. This material can be used, for example, in a method for detecting the repackaging of the integrated circuit after it has been originally packaged.

Abstract translation: 集成电路包括设置在半导体主体的表面的有源电路和设置在半导体主体上方的互连区域。 热电材料设置在互连区域的远离半导体本体的上部。 热电材料被配置为当暴露于温度梯度时传递电能。 该材料可以用于例如在最初封装集成电路的重新包装检测方法之后。

公开(公告)号：US20120009774A1

公开(公告)日：2012-01-12

申请号：US13239118

申请日：2011-09-21

Applicant: Pascal Fornara ,  Christian Rivero

Inventor： Pascal Fornara ,  Christian Rivero

IPC: H01L21/768

CPC classification number: G06K19/07372 ,  H01L23/576 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit including an intrusion attack detection device. The device includes a single-piece formed of a conductive material and surrounded with an insulating material and includes at least one stretched or compressed elongated conductive track, connected to a mobile element, at least one conductive portion distant from said piece and a circuit for detecting an electric connection between the piece and the conductive portion. A variation in the length of said track in an attack by removal of the insulating material, causes a displacement of the mobile element until it contacts the conductive portion.

Abstract translation: 一种包括入侵攻击检测装置的集成电路。 该装置包括由导电材料形成并且被绝缘材料包围的单件，并且包括连接到移动元件的至少一个拉伸或压缩细长导电轨道，远离所述件的至少一个导电部分和用于检测的电路 该片与导电部之间的电连接。 在通过去除绝缘材料的攻击中所述轨道的长度的变化导致移动元件的位移，直到其接触导电部分。

公开(公告)号：US20100059766A1

公开(公告)日：2010-03-11

申请号：US12538336

申请日：2009-08-10

Applicant: Pascal Fornara ,  Fabrice Marinet

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: H01L29/788 ,  H01L21/768

CPC classification number: H01L27/101 ,  G11C17/16 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521

Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.

Abstract translation: 一种集成电路，包括半导体材料的衬底和第一金属化级的第一金属部分或限定图像像素的第一通孔级。 像素分布在第一像素中，其中第一金属部分连接到基板，并且在第二像素中，其中第一金属部分通过至少一个绝缘部分与基板分离。

公开(公告)号：US08872177B2

公开(公告)日：2014-10-28

申请号：US13615309

申请日：2012-09-13

Applicant: Francesco La Rosa ,  Pascal Fornara

Inventor： Francesco La Rosa ,  Pascal Fornara

IPC: H01L23/58 ,  H01L29/94 ,  H01L49/02 ,  H01L21/84 ,  H01L23/522 ,  G04F13/00 ,  G11C27/02 ,  H01L27/08 ,  H01L27/12

CPC classification number: G01R27/2605 ,  G01R17/02 ,  G04F10/10 ,  G04F13/00 ,  G11C11/24 ,  G11C27/024 ,  H01G4/005 ,  H01G4/018 ,  H01G4/38 ,  H01L21/84 ,  H01L23/5223 ,  H01L27/0805 ,  H01L27/1203 ,  H01L28/40 ,  H01L29/94 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A charge flow circuit for a time measurement, including a plurality of elementary capacitive elements electrically in series, each elementary capacitive element leaking through its dielectric space.

Abstract translation: 一种用于时间测量的电荷流动电路，包括电串联的多个基本电容元件，每个元件电容元件通过其介电空间泄漏。

公开(公告)号：US08730707B2

公开(公告)日：2014-05-20

申请号：US12057535

申请日：2008-03-28

Applicant: Pascal Fornara

Inventor： Pascal Fornara

IPC: G11C17/10 ,  G11C17/12 ,  G11C17/08

CPC classification number: H01L27/112 ,  G11C11/5692 ,  G11C17/123 ,  H01L27/02 ,  H01L27/11226

Abstract: The programming of a read-only memory formed of MOS transistors is set by a mask for forming an insulating layer prior to the forming of contacts of active regions of the transistors. The programming of the read-only memory cannot be determined by visible inspection of the memory.

Abstract translation: 由MOS晶体管形成的只读存储器的编程通过用于在形成晶体管的有源区的触点的形成绝缘层的掩模来设置。 只读存储器的编程不能通过对存储器的可见检查来确定。

公开(公告)号：US20130011944A1

公开(公告)日：2013-01-10

申请号：US13615104

申请日：2012-09-13

Applicant: Pascal Fornara ,  Fabrice Marinet

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: H01L33/08

CPC classification number: H01L27/101 ,  G11C17/16 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521

Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.

Abstract translation: 一种集成电路，包括半导体材料的衬底和第一金属化级的第一金属部分或限定图像像素的第一通孔级。 像素分布在第一像素中，其中第一金属部分连接到基板，并且在第二像素中，其中第一金属部分通过至少一个绝缘部分与基板分离。

公开(公告)号：US20110108902A1

公开(公告)日：2011-05-12

申请号：US12990682

申请日：2009-05-12

Applicant: Pascal Fornara

Inventor： Pascal Fornara

IPC: H01L29/788

CPC classification number: H01L27/1052 ,  H01L27/112 ,  H01L27/11213 ,  H01L27/11519 ,  H01L27/11521

Abstract: A non-volatile memory including at least first and second memory cells each including a storage MOS transistor with dual gates and an insulation layer provided between the two gates. The insulation layer of the storage transistor of the second memory cell includes at least one portion that is less insulating than the insulation layer of the storage transistor of the first memory cell.

Abstract translation: 包括至少第一和第二存储器单元的非易失性存储器，每个存储单元包括具有双栅极的存储MOS晶体管和设置在两个栅极之间的绝缘层。 第二存储单元的存储晶体管的绝缘层包括与第一存储单元的存储晶体管的绝缘层绝缘性更差的至少一部分。