公开(公告)号：US09348537B2

公开(公告)日：2016-05-24

申请号：US14467404

申请日：2014-08-25

Applicant: QUALCOMM Incorporated

Inventor： Dolev Raviv ,  Tatyana Brokhman ,  Maya Haim ,  Assaf Shacham

IPC: G06F3/06 ,  G06F13/38

CPC classification number: G06F3/0659 ,  G06F3/0619 ,  G06F3/0679 ,  G06F13/385 ,  G06F2206/1014

Abstract: Ascertaining command completion in flash memories is disclosed. An exemplary aspect includes eliminating the software lock and the outstanding requests variable and replacing them with a transfer request completion register. The transfer request completion register may be mapped to the universal flash storage (UFS) Transfer Protocol (UTP) Transfer Request List (UTRL) slots. The controller of the host—a hardware component—may set the bit in the transfer request completion register on transfer request completion at the same time the doorbell register is cleared. After this bit has been read, the bit in the transfer request completion register is cleared.

Abstract translation: 公开闪存中的确定命令完成。 示例性方面包括消除软件锁定和未完成的请求变量并用传送请求完成寄存器替换它们。 转移请求完成寄存器可以映射到通用闪存存储（UFS）传输协议（UTP）传输请求列表（UTRL）槽。 主机的控制器 - 硬件组件 - 可以在转移请求完成时将门铃寄存器清零的同时设置在传送请求完成寄存器中的位。 读取该位后，转移请求完成寄存器中的位将被清零。

公开(公告)号：US20150347017A1

公开(公告)日：2015-12-03

申请号：US14728400

申请日：2015-06-02

Applicant: QUALCOMM Incorporated

Inventor： Assaf Shacham ,  Maya Haim ,  Lee Susman ,  David Teb

IPC: G06F3/06

CPC classification number: G06F13/1642 ,  G06F3/06 ,  G06F3/061 ,  G06F3/0664 ,  G06F3/0688 ,  G06F13/16

Abstract: Command trapping in an input/output virtualization (IOV) host controller (HC) (IOV-HC) of a flash-memory-based storage device is disclosed. In one aspect, an IOV-HC is configured to receive a request from a client register interface (CRI) of one of multiple input/output (I/O) clients. The IOV-HC inspects a content of the request prior to the request being passed to a transport protocol engine. Based on the content, the IOV-HC determines whether the request should be further processed or should be trapped. If the IOV-HC determines that the request should be trapped, the IOV-HC traps the request using a request trap. In some aspects, the IOV-HC generates an interrupt to a virtual machine manager (VMM) to notify the VMM that the request was trapped. In some aspects, the IOV-HC provides a response generation circuit to receive instructions from the VMM to generate a response to the CRI from which the trapped request originated.

Abstract translation: 公开了基于闪存存储器的存储设备的输入/输出虚拟化（IOV）主机控制器（HC）（IOV-HC）中的命令捕获。 在一个方面，IOV-HC被配置为从多个输入/输出（I / O）客户端之一的客户端寄存器接口（CRI）接收请求。 在请求被传递到传输协议引擎之前，IOV-HC检查请求的内容。 根据内容，IOV-HC确定请求是否应进一步处理或应被捕获。 如果IOV-HC确定请求被捕获，则IOV-HC使用请求陷阱捕获请求。 在某些方面，IOV-HC会向虚拟机管理器（VMM）产生中断，以通知VMM该请求被捕获。 在一些方面，IOV-HC提供响应生成电路以从VMM接收指令以产生对被捕获请求产生的CRI的响应。

公开(公告)号：US20150346795A1

公开(公告)日：2015-12-03

申请号：US14728296

申请日：2015-06-02

Applicant: QUALCOMM Incorporated

Inventor： Assaf Shacham ,  Lee Susman ,  David Teb

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G11C16/30 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3275 ,  G06F1/3287 ,  G06F13/1663

Abstract: A multi-host power controller (MHPC) of a flash-memory-based storage device is disclosed. In one aspect, the MHPC receives power mode change requests from each of multiple input/output (I/O) clients. The MHPC extracts and stores a “vote,” or a requested power mode, from the power mode change requests, and then applies a voting logic to the stored votes to determine whether to transition the flash-memory-based storage device between power modes. If the flash-memory-based storage device is not currently operating in the power mode determined by the MHPC, the MHPC is configured to issue a power mode change command to the flash-memory-based storage device to transition to the determined power mode. In this manner, the MHPC is able to control the power mode of the flash-memory-based storage device while receiving direct power mode change requests from multiple I/O clients.

Abstract translation: 公开了一种基于闪存存储器的存储设备的多主机功率控制器（MHPC）。 在一个方面，MHPC从多个输入/输出（I / O）客户端中的每一个接收功率模式改变请求。 MHPC从功率模式改变请求中提取并存储“投票”或请求的功率模式，然后对所存储的投票应用投票逻辑，以确定是否在功率模式之间转换基于闪存存储器的存储设备。 如果基于闪速存储器的存储设备当前没有以由MHPC确定的功率模式工作，则MHPC被配置为向基于闪存存储器的存储设备发布功率模式改变命令以转换到所确定的功率模式。 以这种方式，MHPC能够在接收来自多个I / O客户端的直接功率模式改变请求的同时控制基于闪存存储器的存储设备的功率模式。

公开(公告)号：US20140310536A1

公开(公告)日：2014-10-16

申请号：US14244742

申请日：2014-04-03

Applicant: Qualcomm Incorporated

Inventor： Assaf Shacham

IPC: G06F21/78

CPC classification number: G06F21/78 ,  G06F3/0623 ,  G06F3/0658 ,  G06F3/0679 ,  G06F2221/2107

Abstract: Various features pertain to inline encryption and decryption. In one aspect, inline read/write operations are performed by configuring an off-chip storage device to provide parameters to facilitate inline encryption/decryption of data by a host storage controller of a system-on-a-chip (SoC.) The parameters provided by the storage device to the host storage controller include an identifier that is the same for read and write operations for a particular block of data but differs from one block of data to another. The host storage controller employs the parameters as initial vectors to generate encryption keys for use in encrypting/decrypting data. Exemplary read and write operations of the host storage controller and the off-chip storage device are described herein. Examples are also described wherein the parameters are obtained from host memory rather than from the storage device.

Abstract translation: 各种功能涉及内联加密和解密。 在一个方面，通过配置片外存储设备来提供参数以便于由片上系统（SoC）的主机存储控制器进行数据的内联加密/解密来执行内联读/写操作。参数 由存储设备提供给主机存储控制器的标识符包括对于特定数据块的读取和写入操作相同的标识符，但是不同于一个数据块到另一个数据块。 主机存储控制器采用参数作为初始向量来生成用于加密/解密数据的加密密钥。 这里描述了主存储控制器和片外存储设备的示例性的读取和写入操作。 还描述了其中参数是从主机存储器而不是从存储设备获得的示例。

公开(公告)号：US09881680B2

公开(公告)日：2018-01-30

申请号：US14728296

申请日：2015-06-02

Applicant: QUALCOMM Incorporated

Inventor： Assaf Shacham ,  Lee Susman ,  David Teb

IPC: G06F1/32 ,  G11C16/30 ,  G06F1/26 ,  G06F13/16

CPC classification number: G11C16/30 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3275 ,  G06F1/3287 ,  G06F13/1663

Abstract: A multi-host power controller (MHPC) of a flash-memory-based storage device is disclosed. In one aspect, the MHPC receives power mode change requests from each of multiple input/output (I/O) clients. The MHPC extracts and stores a “vote,” or a requested power mode, from the power mode change requests, and then applies a voting logic to the stored votes to determine whether to transition the flash-memory-based storage device between power modes. If the flash-memory-based storage device is not currently operating in the power mode determined by the MHPC, the MHPC is configured to issue a power mode change command to the flash-memory-based storage device to transition to the determined power mode. In this manner, the MHPC is able to control the power mode of the flash-memory-based storage device while receiving direct power mode change requests from multiple I/O clients.

公开(公告)号：US09880748B2

公开(公告)日：2018-01-30

申请号：US14621874

申请日：2015-02-13

Applicant: QUALCOMM Incorporated

Inventor： Amit Gil ,  Assaf Shacham

IPC: G06F12/02 ,  G06F3/06 ,  G06F9/50 ,  G06F13/16

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/50 ,  G06F12/0246 ,  G06F13/1668 ,  G06F2212/1024 ,  G06F2212/7201 ,  G06F2212/7202

Abstract: Bifurcated memory management for memory elements techniques are disclosed. In one aspect, a memory element includes a self-managed portion and a portion that is managed by a remote host. Software that needs low latency access may be stored in the portion of the memory element that is managed by the remote host and other software may be stored in the portion of the memory element that is managed by the memory element. By providing such bifurcated memory management of the memory element, a relatively inexpensive memory element may be used to store software while at the same time allowing low latency (albeit at low throughputs) access to sensitive software elements with minimal bus logic.

公开(公告)号：US09779262B2

公开(公告)日：2017-10-03

申请号：US14691302

申请日：2015-04-20

Applicant: QUALCOMM Incorporated

Inventor： Ron Keidar ,  Osman Koyuncu ,  Assaf Shacham

IPC: G06F9/00 ,  G06F9/24 ,  G06F15/177 ,  G06F21/62 ,  G09C1/00 ,  H04L9/06 ,  G06F21/57 ,  G06F21/60 ,  G06F21/72

CPC classification number: G06F21/6218 ,  G06F21/575 ,  G06F21/602 ,  G06F21/72 ,  G09C1/00 ,  H04L9/0618 ,  H04L9/0637 ,  H04L2209/12 ,  H04L2209/125 ,  H04L2209/24

Abstract: Disclosed is a method and apparatus to decrypt file segments in parallel. In one embodiment, an integrated circuit may be used with a storage device of a computing device that comprises: a hardware interface to communicate with the storage device; a crypto-engine to encrypt file segments to be stored on the storage device and to decrypt file segments read from the storage device; and a processor. The processor may be configured to: read a plurality of decrypted file segments from the storage device through the crypto-engine in parallel; and to store the plurality of decrypted file segments.

公开(公告)号：US20170269956A1

公开(公告)日：2017-09-21

申请号：US15075945

申请日：2016-03-21

Applicant: QUALCOMM Incorporated

Inventor： Assaf Shacham ,  Tom Yahalom ,  David Teb

IPC: G06F9/455 ,  G06F3/06

CPC classification number: G06F9/45558 ,  G06F3/0605 ,  G06F3/0613 ,  G06F3/062 ,  G06F3/0635 ,  G06F3/0644 ,  G06F3/0659 ,  G06F3/0664 ,  G06F3/067 ,  G06F3/0679 ,  G06F2009/45583 ,  G06F2009/45595

Abstract: Storage resource management in virtualized environments is provided. In this regard, when receiving a request for accessing a target general purpose partition (GPP) in a storage device, partition switching circuitry is configured to determine whether the target GPP equals a current GPP that is accessed by a list of existing requests. The partition switching circuitry adds the request into the list of existing requests if the target GPP equals the current GPP. Otherwise, the partition switching circuitry waits for the list of existing requests to be executed on the current GPP before switching to the target GPP to execute the request received from a client. By switching to the target GPP after executing the list of existing commands on the current GPP, it is possible to share a plurality of GPPs among multiple clients in a virtualized environment while maintaining data integrity and security in the storage device.

公开(公告)号：US20160239218A1

公开(公告)日：2016-08-18

申请号：US14621874

申请日：2015-02-13

Applicant: QUALCOMM Incorporated

Inventor： Amit Gil ,  Assaf Shacham

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/50 ,  G06F12/0246 ,  G06F13/1668 ,  G06F2212/1024 ,  G06F2212/7201 ,  G06F2212/7202

Abstract: Bifurcated memory management for memory elements techniques are disclosed. In one aspect, a memory element includes a self-managed portion and a portion that is managed by a remote host. Software that needs low latency access may be stored in the portion of the memory element that is managed by the remote host and other software may be stored in the portion of the memory element that is managed by the memory element. By providing such bifurcated memory management of the memory element, a relatively inexpensive memory element may be used to store software while at the same time allowing low latency (albeit at low throughputs) access to sensitive software elements with minimal bus logic.

Abstract translation: 公开了用于存储器元件技术的分叉存储器管理。 在一个方面，存储元件包括自管理部分和由远程主机管理的部分。 需要低延迟访问的软件可以存储在由远程主机管理的存储器元件的部分中，并且其他软件可以存储在由存储器元件管理的存储器元件的部分中。 通过提供存储器元件的这种分叉存储器管理，可以使用相对便宜的存储器元件来存储软件，同时允许以最小总线逻辑访问敏感软件元件的低延迟（尽管在低吞吐量）。

公开(公告)号：US20160216898A1

公开(公告)日：2016-07-28

申请号：US14603630

申请日：2015-01-23

Applicant: QUALCOMM INCORPORATED

Inventor： Konstantin Dorfman ,  Assaf Shacham

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/0635 ,  G06F3/0659 ,  G06F3/0662 ,  G06F3/0664 ,  G06F3/067 ,  G06F3/0679

Abstract: Aspects disclosed in the detailed description include storage resource management in virtualized environments. In this regard, in one aspect, a virtualization layer is provided in a storage controller as an interface between one or more clients and a storage device. The storage controller is configured to trap storage resource requests from a client. A virtualized resource manager creates a virtual resource allocation that corresponds to a physical resource allocation in the storage device. The client receives the virtual resource allocation from the virtualization layer and subsequently accesses the virtual resource allocation through the storage controller as if the client were the sole user of the storage device. By trapping the storage resource requests at the storage controller and providing the virtual resource allocations to the one or more clients, it is possible to share compatibly the storage device among the one or more clients in a virtualized environment.

Abstract translation: 在详细描述中公开的方面包括虚拟化环境中的存储资源管理。 在这方面，在一方面，虚拟化层被提供在存储控制器中作为一个或多个客户机和存储设备之间的接口。 存储控制器被配置为从客户端捕获存储资源请求。 虚拟资源管理器创建与存储设备中的物理资源分配相对应的虚拟资源分配。 客户机从虚拟化层接收虚拟资源分配，随后通过存储控制器访问虚拟资源分配，就像客户端是存储设备的唯一用户一样。 通过在存储控制器处捕获存储资源请求并向一个或多个客户端提供虚拟资源分配，可以在虚拟化环境中的一个或多个客户端之间共享共享存储设备。