公开(公告)号：US20160118887A1

公开(公告)日：2016-04-28

申请号：US14630362

申请日：2015-02-24

Applicant: QUALCOMM Incorporated

Inventor： Chuang Zhang ,  James Thomas Doyle ,  Farsheed Mahmoudi ,  Amirali Shayan Arani

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/126 ,  H02M3/07 ,  H02M7/483 ,  H02M2003/072

Abstract: A circuit including: a control system for a three-level buck converter, the three-level buck converter including multiple input switches, each of the input switches receiving one of a plurality of different pulse width modulated signals, the control system including: a first clock signal and a second clock signal, the second clock signal being a phase-shifted version of the first clock signal; ramp generating circuitry receiving the first and second clock signals and producing first and second ramp signals, respectively, from the first and second clock signals; a first comparing circuit receiving the first ramp signal and producing a first one of the pulse width modulated signals therefrom; and a second comparing circuit receiving the second ramp signal and producing a second one of the pulse width modulated signals therefrom.

Abstract translation: 一种电路，包括：用于三电平降压转换器的控制系统，所述三电平降压转换器包括多个输入开关，每个输入开关接收多个不同的脉宽调制信号中的一个，所述控制系统包括：第一 时钟信号和第二时钟信号，所述第二时钟信号是所述第一时钟信号的相移版本; 斜坡发生电路接收第一和第二时钟信号并分别从第一和第二时钟信号产生第一和第二斜坡信号; 接收所述第一斜坡信号并从其产生所述脉冲宽度调制信号中的第一个信号的第一比较电路; 以及第二比较电路，接收所述第二斜坡信号并从其产生所述脉冲宽度调制信号中的第二个。

公开(公告)号：US20140253279A1

公开(公告)日：2014-09-11

申请号：US13791113

申请日：2013-03-08

Applicant: QUALCOMM INCORPORATED

Inventor： James Thomas Doyle ,  Amirali Shayan Arani ,  Farsheed Mahmoudi

IPC: H01F27/36

CPC classification number: H01F27/365 ,  H01F17/02 ,  H01F17/03 ,  H01F27/292 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/19106

Abstract: Some implementations provide a coupled inductor structure that includes a first discrete inductor configured to generate a magnetic field, a second discrete inductor, and a first ferromagnetic layer coupled to the first discrete inductor and the second discrete inductor. The first ferromagnetic layer is configured to concentrate the magnetic field generated by the first discrete inductor within the coupled inductor structure. In some implementations, the coupled inductor structure further includes a second ferromagnetic layer coupled to the first discrete inductor and the second discrete inductor. The second ferromagnetic layer is configured to concentrate the magnetic field generated by the first discrete inductor within the coupled inductor structure. In some implementations, the coupled inductor structure is a bifilar inductor structure. The first discrete inductor includes a first set of windings and the second discrete inductor includes a second set of windings. The first and second discrete inductors share a common core.

Abstract translation: 一些实施方案提供耦合电感器结构，其包括被配置为产生磁场的第一离散电感器，第二离散电感器和耦合到第一分立电感器和第二分立电感器的第一铁磁层。 第一铁磁层被配置为将由第一离散电感器产生的磁场集中在耦合的电感器结构内。 在一些实施方案中，耦合电感器结构还包括耦合到第一分立电感器和第二分立电感器的第二铁磁层。 第二铁磁层被配置为将由第一离散电感器产生的磁场集中在耦合的电感器结构内。 在一些实施方案中，耦合电感器结构是双电感器结构。 第一离散电感器包括第一组绕组，第二分立电感器包括第二组绕组。 第一和第二离散电感共享共同的核心。

公开(公告)号：US20140225706A1

公开(公告)日：2014-08-14

申请号：US13794558

申请日：2013-03-11

Applicant: QUALCOMM INCORPORATED

Inventor： James Thomas Doyle ,  Farsheed Mahmoudi ,  Amirali Shayan Arani

IPC: H01F5/00 ,  H01F41/02

CPC classification number: H01F41/02 ,  H01F17/0006 ,  H01F27/2871 ,  H01F2017/004 ,  H01L23/645 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1433 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/19106 ,  Y10T29/49071 ,  H01L2924/00

Abstract: Some novel features pertain to an in-substrate inductor structure that includes a first inductor winding, a second inductor winding and a substrate. The first inductor winding includes an electrically conductive material. The second inductor winding includes an electrically conductive material. The substrate is laterally located between the first inductor winding and the second inductor winding. The substrate is configured to provide structural coupling of the first and second inductor windings. In some implementations, the first inductor winding is laterally co-planar to the second inductor winding. In some implementations, the first inductor winding has a first spiral shape and the second inductor winding has a second spiral shape. In some implementations, the first inductor winding and the second inductor winding have an elongated circular shape. In some implementations, the substrate is a silicon substrate.

Abstract translation: 一些新颖的特征涉及内置电感器结构，其包括第一电感器绕组，第二电感器绕组和衬底。 第一电感器绕组包括导电材料。 第二电感线圈包括导电材料。 衬底横向位于第一电感器绕组和第二电感器绕组之间。 衬底被配置为提供第一和第二电感器绕组的结构耦合。 在一些实施方案中，第一电感器绕组与第二电感器绕组横向共面。 在一些实施方案中，第一电感器绕组具有第一螺旋形状并且第二电感器绕组具有第二螺旋形状。 在一些实施方案中，第一电感器绕组和第二电感器绕组具有细长的圆形形状。 在一些实施方式中，衬底是硅衬底。